Direct Digital Frequency Synthesizer Designs in MATLAB

: This study presents the structure of the Direct Digital Frequency Synthesizers (DDFSs) which have several advantages compared to conventional synthesizers such as high frequency, fast switching speed and low power dissipations. In order to lessen the physical area and power dissipation, ROM compression techniques are applied in designs. Bipartite Table Method (BTM) and Multipartite Table Method (MTM) are utilized in this study because of the fact that they provide high compression rates. By using MTM, the compression rates of 157.54:1, 726.71:1 and 3463.29:1 are obtained at 58.40 dB, 75.30 dB and 84.66 dB SFDR levels, respectively.


Introduction
Direct Digital Frequency Synthesis is one of the most popular techniques to synthesize frequency for the systems requiring specific frequencies, fast switching, low power dissipation and small silicon area. There are several methods using table based or iterative approaches to implement Direct Digital Frequency Synthesizers (DDFSs). In addition to natural advantages of the approaches, ROM compression techniques are applied to reduce the ROM size. Furthermore, the approaches are enhanced with some modifications offering trade-off between Spurious Free Dynamic Range (SFDR), switching speed and the used silicon area. Direct Digital Frequency Synthesizers (DDFSs) are commonly used in several areas such as defense industry, satellite systems, radars, test and measuring equipments, etc. As distinct from analog or indirect synthesizers, DDFSs provide high frequency resolution, fast switching speed, continuous phase switching, small physical area and low power dissipation [1]. For the last 10 years, works on the frequency synthesizers are focused on minimizing the used area and power dissipation while keeping the spectral purity above an acceptable level [2], [3] and [4]. High frequency synthesizers are also studied with some recently offered approaches [5], [6] and [7]. A DDFS consists of three sub blocks which are phase accumulator, phase to amplitude converter and the digital to analog converter. Figure 1 illustrates the principle parts of a DDFS.

Phase Accumulator
Phase accumulator is used in DDFS for an adjustable frequency output. It is controlled by an N bit Frequency Tuning Word (FTW). Several frequencies can be obtained by using this digital control word with one clock source. Phase accumulator works as an N bit counter and a digital phase wheel is created. Each of the 2 points on this wheel correspond the amplitude value of the related phase. The increment of the counter is determined by the FTW. Figure 2 illustrates the digital phase wheel idea. The frequency of the output signal is

Phase to Amplitude Converter (PAC)
There are two main approaches for phase to amplitude conversion in a DDFS. The corresponding amplitude value of the related phase can be obtained by using Look Up Tables (LUTs) or iterative calculations. While table based methods allow operating at higher frequencies, iterative methods provides better spectral purity. Many studies have done about both methods for the last decade [2], [9], [11] and [12]. The works about table based methods have generally aimed to reduce the ROM size and to increase the Spurious Free Dynamic Range (SFDR) which shows the spectral purity of the generated sinusoid. On the other hand, COordniate Rotational Digital Computer (CORDIC) based iterative methods have been proposed to achieve better SFDR levels.

Digital to Analog Converter (DAC)
DACs are used to convert the digital data taken from the PACs to analog signals. DAC part is one of the most important parts of the DDFS and directly related to its performance. The resolution and sampling frequency of DAC are able to determine the limits of DDFS. While delta-sigma and R-2R type DACs are beneficial when high resolution is required, current steering type DACs have sampling rates up to GSPSs with comparatively lower resolution. The lower resolution comes with higher quantizing errors and this cause a decrement in SFDR but oversampling may lessen the decrement a little. Addition to all these, the AC and DC characteristics of the DAC are also important and need to be considered at the implementation stage [8].

CORDIC Based DDFSs
CORDIC is a structure that was proposed by Volder to calculate basic trigonometric functions in 1959 [10]. In CORDIC based algorithms, two-dimension vector rotation idea is used. The vector rotation idea is shown in Figure 3, and the related trigonometric equations are As mentioned earlier, CORDIC is applied as an iterative method to calculate some trigonometric functions. Angle (θ) of rotation is completed after T sub rotations and evaluated as in Eq. (2.4) where δ t is the direction of the rotation.
tan θ is chosen as multiple of 2 −1 so that (2.3) is easily applied digitally. The equation can be rearranged as The gain constant is generally applied as the initial end point. P(G, 0) is used instead of P(0, 0) as the initial end point of the vector where = ∏ √ + − [11]. Quadrant compression technique uses the symmetric structure of the sinusoid. Instead of a LUT that stores the sine values between0 − 2π, a LUT that stores the sine values between 0 − π/2 is used. The most significant two bits of the P bit phase word determine the quadrant of the phase wheel and the rest include the phase information. The block diagram of the technique is given in Figure 4. As distinct from the piecewise linear approach, x axis is divided into 2 b larger intervals (b < a) and same slope value used for the adjacent pieces in larger intervals. Thus, the ROM size is efficiently decreased. Figure 5 shows the piecewise linear approach used in BTM.

Table Based DDFSs
In BTM, there are two tables to store the values required for the interpolation. The y i values are stored in  The study of De Caro and his friends shows that the number of TOs is not proportional to SFDR. The study also indicates that SFDR of the DDFS strongly depends on x, y, z numbers. From the point of this view, it is obvious that an optimization is essential to get best results. If the number of TOs is more than two then the optimization requires more complex algorithms and calculations. Moreover, the higher number of TOs does not ensure smaller physical area in compression with two or three TOs for the SFDR levels less than 90 dBc [9]. Thus, this paper is focused on the table based methods with one or two TOs.

MATLAB Results
There are three main objectives while designing a DDFS. These are maximizing the SFDR, minimizing the ROM size and increasing the maximum operating frequency as much as possible. In this paper, the SFDR and ROM size considerations are investigated.

BTM Design
As mentioned earlier, BTM uses two different tables to store the sine amplitude information. While one of them is for initial values, the other one is for the offset values. The size of TIV is calculated as R is the amplitude resolution and α is the number of bits that represents TIV values. TO values are represented with β + γ bits and the size is calculated as The sum of TO size and TIV size gives the total ROM size. The compression ratio is evaluated as 3) The P phase information taken from the accumulator includes α and γ bits. The ROM size depends on these bits with some β bits in α bits. Figure 6 shows the decomposition of the phase word.  The BTM design results are given in Table 3.1 and allow two significant deductions. Firstly, it is obvious that increasing the length of the phase word does not improve the SFDR and it makes the ROM size bigger. So, determining the best decomposition of the phase word has a great importance. Secondly, increasing the amplitude resolution provides better SFDR but causes a notable increment in the ROM size.

MTM Design
MTM is originally based on BTM and requires smaller ROM size comparing to it with a negligible decrease in SFDR. It is generally preferred when higher SFDR is required because BTM provides the same SFDR with a very high ROM size. In this part of the paper, some MTM design results are investigated and are compared with BTM. The TIV size calculation in MTM is similar to BTM. Using more than one TO makes the difference in total ROM size. The phase word decomposition is given in Figure 7 where θ i = β i + γ i . The phase word length and the amplitude resolution determine SFDR and ROM size. Some design results are given in Table 3.2.
As clearly seen from the table it is possible to reach better SFDR by just rearranging the decomposition of the phase word. The results indicate that minimizing α value allows making total ROM size smaller. It is also clear that increasing P and R values causes a remarkable rise in SFDR. While closer α, i and i+1 values provide the best compression, it is more complicated to offer any condition for the best SFDR. Although there are some algorithms proposed to find out the best decomposition of the phase word for a specific SFDR level, there is not any multi-objective algorithm to optimize both the SFDR and the ROM size. In this paper, any algorithm is not used and the results given in tables show the effect of the parameters.

Conclusions
The DDFS structure has been investigated in this study. The phase accumulator, phase to amplitude converter and digital to analog converter blocks of the structure has been mentioned in section I. Later on, CORDIC, BTM and MTM based DDFS have been explained in section II. In section III, The main problem of the table based methods is that they need much more physical area. When advanced ROM compression techniques such as MTM are applied to minimize the area, a complex optimization algorithm is required at higher SFDR levels. There are some beneficial optimization algorithms to minimize the ROM size at some target SFDR levels but multiobjective optimization techniques may be considered as a future work to optimize the sampling frequency, ROM size and SFDR.