TY  - JOUR
T1  - Tek Kaynaktan 27 Seviye Üreten Çok Girişli Transformatör Tabanlı Evirici Tasarımı ve Kontrolü
TT  - Design and Control of a Multi-Input Transformer-Based Inverter Producing 27 Levels from a Single Source
AU  - Hataş, Hasan
PY  - 2025
DA  - September
Y2  - 2025
DO  - 10.21597/jist.1700386
JF  - Journal of the Institute of Science and Technology
JO  - J. Inst. Sci. and Tech.
PB  - Igdir University
WT  - DergiPark
SN  - 2536-4618
SP  - 861
EP  - 871
VL  - 15
IS  - 3
LA  - tr
AB  - Çok seviyeli eviricilerde (ÇSE) çoklu DA bara gerilimlerine duyulan ihtiyaç, sistemin maliyetini ve karmaşıklığını artırmaktadır. Bu soruna yönelik bir çözüm yolu, Yüksek Frekans Bağlantısı (YFB) kullanılarak gerilimlerin izole olarak sisteme dahil edilmesidir. YFB'nin alışılagelmiş kullanım şeklinde, kare dalga sinyali bir H-köprüsü tarafından üretilir. Bu çalışmada ise, YFB öncesinde kullanılan H-köprü iki tane kullanarak transformatör 3 birincil sargılı ayarlanmıştır. Böylece YFB'den elde edilen voltaj çeşitlendirilerek, 7 seviye üretebilen PUC devresinden 27 seviye çıkış alınmıştır. Ayrıca evirici gerilim THB’sinin minimum olması için transformatör sargı sayıları guguk kuşu optimizasyon algoritması kullanılmıştır. Önerilen 27 seviyeli topoloji, bir endüktif filtre kullanılarak farklı frekans ve genlik değerlerindeki çıkışlarla test edilmek suretiyle doğrulanmıştır. Simülasyon bulguları, önerilen topolojideki çok girişli transformatörün yenilikçi ve rekabetçi diğer ÇSE devrelerine uygulanabilirliğini göstermektedir.
KW  - Yüksek Frekans Bağlantısı
KW  - Çok Seviyeli Evirici
KW  - Evirici
KW  - Çok Girişli Transformatör
N2  - The need for multiple DC bus voltages in multi-level inverters (MLIs) increases the cost and complexity of the system. A solution to this problem is to include the voltages in the system in isolation by using High Frequency Link (HFL). In the conventional usage of HFL, the square wave signal is generated by an H-bridge. In this study, the transformer is set to 3 primary windings by using two H-bridges used before HFL. Thus, the voltage obtained from HFL is diversified and 27 level output is obtained from the PUC circuit that can produce 7 levels. In addition, the cuckoo optimization algorithm is used for the transformer winding numbers to minimize the inverter voltage THD. The proposed 27-level topology is verified by testing it with outputs at different frequencies and amplitudes using an inductive filter. Simulation findings show that the multi-input transformer in the proposed topology can be applied to other innovative and competitive MLI circuits.
CR  - Aktar, A. K. (2025). Energy transition in smart grids: Combining hydrogen, methanation and electric vehicles for sustainable heat and power. International Journal of Hydrogen Energy, 140, 787-802. doi:10.1016/J.IJHYDENE.2025.05.363
CR  - Chen, J., Zhang, J., Zhou, J., Shi, G., Jia, Y., Wang, H., Cai, X. (2024). Enhanced Modular Multilevel Converter with Multiple MVac Ports Based on Active Fundamental-Frequency Circulating Current Injection to Realize Full-Range Operation. IEEE Transactions on Power Electronics. doi:10.1109/TPEL.2024.3519892
CR  - Hatas, H., Almali, M. N. (2023a). Design and control of bypass diode multilevel inverter using a single DC source. Electric Power Systems Research, 216. doi:10.1016/j.epsr.2022.109039
CR  - Hatas, H., Almali, M. N. (2023b). Design and control of a novel topology for multilevel inverters using high frequency link. Electric Power Systems Research, 221. doi:10.1016/j.epsr.2023.109458
CR  - Junior, Samuel Carvallho Silva, Jacobina, C. B., Fabricio, E. L. L., Felinto, A. S. (2022). Asymmetric 49-Levels Cascaded MPUC Multilevel Inverter Fed by a Single DC Source. IEEE Transactions on Industry Applications, 58(6). doi:10.1109/TIA.2022.3202875
CR  - Junior, Samuel C.S., Jacobina, C., Fabricio, E. L. L. (2021). A Single-Phase 35-levels Cascaded PUC Multilevel Inverter Fed by a Single DC-Source. 2021 IEEE Energy Conversion Congress and Exposition, ECCE 2021 - Proceedings,. doi:10.1109/ECCE47101.2021.9595834
CR  - Karakılıç, M. (2025). A Novel Enhanced Switched Capacitor (ESC) Unit and ESC Based 9L MLI Topology. Journal of Electrical Engineering and Technology, 1-16. doi:10.1007/S42835-025-02202-9/FIGURES/25
CR  - Karakılıç, M., Hataş, H., Nuri Almalı, M. (2023). Design of a 21-level multilevel inverter with minimum number of devices count. International Journal of Circuit Theory and Applications, 51(12). doi:10.1002/cta.3730
CR  - Li, J., Huang, A. Q., Liang, Z., Bhattacharya, S. (2012). Analysis and design of active NPC (ANPC) inverters for fault-tolerant operation of high-power electrical drives. IEEE Transactions on Power Electronics, 27(2), 519-533. doi:10.1109/TPEL.2011.2143430
CR  - Mahto, K. K., Das, P., Das, D., Mittal, S., Mahato, B. (2024). A New Criss-Cross-Based Asymmetrically Configured T-Type Multi-level Inverter. Lecture Notes in Electrical Engineering, 1148 LNEE, 1-14. doi:10.1007/978-981-97-0154-4_1
CR  - Memis, M., Karakilic, M. (2025). 7-Level Soft Charging Switched Capacitor Multilevel Inverter. IEEE Access. doi:10.1109/ACCESS.2025.3560576
CR  - Modeer, T., Pallo, N., Foulkes, T., Barth, C. B., Pilawa-Podgurski, R. C. N. (2020). Design of a GaN-Based Interleaved Nine-Level Flying Capacitor Multilevel Inverter for Electric Aircraft Applications. IEEE Transactions on Power Electronics, 35(11), 12153-12165. doi:10.1109/TPEL.2020.2989329
CR  - Murshid, S., Tayyab, M., Sarwar, A., Tariq, M., Al-Durra, A., Tomar, A. (2022). Self-Balanced Twenty Five Level Switched Capacitor Multilevel Inverter with Reduced Switch Count and Voltage Boosting Capability. IEEE Transactions on Industry Applications, 58(2), 2183-2194. doi:10.1109/TIA.2021.3136802
CR  - Pereda, J., Dixon, J. (2011). High-frequency link: A solution for using only one DC source in asymmetric cascaded multilevel inverters. IEEE Transactions on Industrial Electronics, 58(9). doi:10.1109/TIE.2010.2103532
CR  - Venkataramanaiah, J., Suresh, Y., Panda, A. K. (2017). A review on symmetric, asymmetric, hybrid and single DC sources based multilevel inverter topologies. Renewable and Sustainable Energy Reviews. doi:10.1016/j.rser.2017.03.066
CR  - Yarlagadda, A. K., Verma, V. (2022). Trinary asymmetric cascaded H bridge (1:3:9) multilevel inverter with self-balanced capacitor. Journal of Power Electronics, 22(9). doi:10.1007/s43236-022-00467-1
UR  - https://doi.org/10.21597/jist.1700386
L1  - https://dergipark.org.tr/en/download/article-file/4875048
ER  -