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Year 2019, Volume: 6 Issue: 3, 185 - 191, 30.09.2019
https://doi.org/10.17350/HJSE19030000146

Abstract

References

  • Zhang Y, Cai W, Kang W, Yang J, Deng E, Zhang Y, Zhao W, Ravelosona D, Demonstration of Mult-State Memory Device Combining Resistive and Magnetic Switching Behaviors, IEEE Electron Device Letters 39-5 (2018) 684-687.
  • Stathopoulos S, Khiat A, Trapatseli M, Cortese S, Serb A, Valov I, Prodromakis T. Multibit memory operation of metal-oxide bi-layer memristors. Scientific Reports 7-17532 (2017) 1-7.
  • Yang B. Low-power and area-efficient shift register using pulsed latches. IEEE transactions on Circuits and Systems-I: Regular Papers 62-6 (2015) 1564-1571.
  • Kvatinsky S., Satat G., Wald N., Friedman EG, Kolodny A., Weiser, U. C.. Memristor-based material implication (IMPLY) logic: Design principles and methodologies. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 221-10 (2014) 2054-2066.
  • Rajendran J, Manem H, Karri R, Rose GS An energy-efficient memristive threshold logic circuit. IEEE Transactions on Computers 61-4 (2012) 474-487.
  • Kvatinsky S, Belousov D, Liman S, Satat G, Wald N, Friedman EG, Weiser UC. MAGIC—Memristor-aided logic. IEEE Transactions on Circuits and Systems II: Express Briefs 61-11 (2014) 895-899.
  • Guckert L, Swartzlander EE. MAD gates—Memristor logic design using driver circuitry. IEEE Transactions on Circuits and Systems II: Express Briefs 64-2 (2017) 171-175.
  • Guckert L, Swartzlander EE. Optimized memristor-based multipliers. IEEE Transactions on Circuits and Systems I: Regular Papers 64-2 (2017) 373-385.
  • Teimoory M, Amirsoleimani A, Ahmadi A, Alirezaee S, Salimpour S, Ahmadi M. Memristor-based linear feedback shift register based on material implication logic. European Conference on Circuit Theory and Design (ECCTD) August, pp. 1-4, 2015. Pickett MD, Strukov DB, Borghetti JL, Yang JJ, Snider GS, Stewart DR, Williams RS. Switching dynamics in titanium dioxide memristive devices. Journal of Applied Physics, 106-7 (2009) 074508.
  • Yakopcic C, Taha TM, Subramanyam G, Pino RE. Generalized memristive device SPICE model and its application in circuit design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32-8 (2013) 1201-1214.
  • Kvatinsky S, Friedman EG, Kolodny A, Weiser UC. TEAM: Threshold adaptive memristor model. IEEE Transactions on Circuits and Systems I: Regular Papers, 60-1 (2013) 211-221.
  • Elshamy M, Mostafa H, Ghallab YH, Said MS. A novel nondestructive read/write circuit for memristor-based memory arrays. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23-11, (2015) 2648-2656.
  • Ho Y, Huang GM, Li P. Dynamical properties and design analysis for nonvolatile memristor memories. IEEE Transactions on Circuits and Systems I: Regular Papers, 58-4, (2011) 724-736.

Memristor Based Multi-State Shift Register Architecture

Year 2019, Volume: 6 Issue: 3, 185 - 191, 30.09.2019
https://doi.org/10.17350/HJSE19030000146

Abstract

Bio-inspiring circuit design attracts a great deal of attention among researchers in the field of electronics. Memristor has emerged not only because of their potential use in neuromorphic circuits but also because of their feasible fabrication using low-cost techniques. This research presents the use of memristors to build multi-state shift registers. Memristors are capable of storing and processing multi-state logic and design of an architecture for their use in shift register have potential applications in bio-inspired integrated circuits, telecommunication systems, cryptology, display technologies, data storage, chaotic circuits, etc. The designed shift register consists of stages with capability to store and transfer multiple bits. The number of stages can be adjusted depending on the requirements of the specific applications. Each stage of the shift register consists of two memristors for a continuous signal generation at the output of each stage. Reading and writing are executed in sequential order so that when reading operation is performed by a memristor, new data is transferred to another for writing. The amplitude of the voltage corresponds to the logic state and voltage levels are classified into logic states using comparators. For n-state logic, 2n-1 comparators are required at each stage. Yakopcic’s memristor model is used in the simulations conducted in LTSPICE. The multi-state shift register architecture provided in this research successfully stores and shifts the data in the desired logic state.

References

  • Zhang Y, Cai W, Kang W, Yang J, Deng E, Zhang Y, Zhao W, Ravelosona D, Demonstration of Mult-State Memory Device Combining Resistive and Magnetic Switching Behaviors, IEEE Electron Device Letters 39-5 (2018) 684-687.
  • Stathopoulos S, Khiat A, Trapatseli M, Cortese S, Serb A, Valov I, Prodromakis T. Multibit memory operation of metal-oxide bi-layer memristors. Scientific Reports 7-17532 (2017) 1-7.
  • Yang B. Low-power and area-efficient shift register using pulsed latches. IEEE transactions on Circuits and Systems-I: Regular Papers 62-6 (2015) 1564-1571.
  • Kvatinsky S., Satat G., Wald N., Friedman EG, Kolodny A., Weiser, U. C.. Memristor-based material implication (IMPLY) logic: Design principles and methodologies. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 221-10 (2014) 2054-2066.
  • Rajendran J, Manem H, Karri R, Rose GS An energy-efficient memristive threshold logic circuit. IEEE Transactions on Computers 61-4 (2012) 474-487.
  • Kvatinsky S, Belousov D, Liman S, Satat G, Wald N, Friedman EG, Weiser UC. MAGIC—Memristor-aided logic. IEEE Transactions on Circuits and Systems II: Express Briefs 61-11 (2014) 895-899.
  • Guckert L, Swartzlander EE. MAD gates—Memristor logic design using driver circuitry. IEEE Transactions on Circuits and Systems II: Express Briefs 64-2 (2017) 171-175.
  • Guckert L, Swartzlander EE. Optimized memristor-based multipliers. IEEE Transactions on Circuits and Systems I: Regular Papers 64-2 (2017) 373-385.
  • Teimoory M, Amirsoleimani A, Ahmadi A, Alirezaee S, Salimpour S, Ahmadi M. Memristor-based linear feedback shift register based on material implication logic. European Conference on Circuit Theory and Design (ECCTD) August, pp. 1-4, 2015. Pickett MD, Strukov DB, Borghetti JL, Yang JJ, Snider GS, Stewart DR, Williams RS. Switching dynamics in titanium dioxide memristive devices. Journal of Applied Physics, 106-7 (2009) 074508.
  • Yakopcic C, Taha TM, Subramanyam G, Pino RE. Generalized memristive device SPICE model and its application in circuit design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32-8 (2013) 1201-1214.
  • Kvatinsky S, Friedman EG, Kolodny A, Weiser UC. TEAM: Threshold adaptive memristor model. IEEE Transactions on Circuits and Systems I: Regular Papers, 60-1 (2013) 211-221.
  • Elshamy M, Mostafa H, Ghallab YH, Said MS. A novel nondestructive read/write circuit for memristor-based memory arrays. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23-11, (2015) 2648-2656.
  • Ho Y, Huang GM, Li P. Dynamical properties and design analysis for nonvolatile memristor memories. IEEE Transactions on Circuits and Systems I: Regular Papers, 58-4, (2011) 724-736.
There are 13 citations in total.

Details

Primary Language English
Journal Section Research Article
Authors

Dincer Gokcen This is me

Publication Date September 30, 2019
Published in Issue Year 2019 Volume: 6 Issue: 3

Cite

Vancouver Gokcen D. Memristor Based Multi-State Shift Register Architecture. Hittite J Sci Eng. 2019;6(3):185-91.

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