Modified recycling folded cascode OTA with enhancement in transconductance and output impedance

A modified recycling folded cascode (MRFC) operational transconductance amplifier (OTA) for achieving high DC gain, slew rate, and unity gain bandwidth (UGB) is proposed in this paper. Positive feedback is adopted to enhance DC gain and unity gain bandwidth. The proposed MRFC OTA is compared with conventional folded cascode (FC), recycling folded cascode (RFC), and other OTAs existing in the literature. Three OTAs, FC, RFC, and MRFC, are realized and implemented using the UMC 180 nm CMOS process for the same bias current of 300 μA. The designs are simulated in the Cadence Spectre Environment. From the simulation results, it may be noted that the proposed amplifier achieves a gain of 76.24 dB and unity gain bandwidth of 74.7 MHz with an input referred noise and slew rate of 139.2 μVrms and 64.05 V/μs respectively. The proposed amplifier occupies an area of 2760 μm .


Introduction
Operational transconductance amplifiers (OTAs) are the basic building blocks used for realizing analog systems like analog-to-digital converters or filters. To realize these systems, OTAs are required to have high DC gain, high slew rate, and high unity gain bandwidth. As technology scales down, the intrinsic gain (g m .r o ) , which becomes the bottleneck to design high-performance OTAs, has been reduced. To overcome this limitation, in deep submicron technologies, folded cascode OTA is the preferred topology due to its high gain and large swings. In the existing literature, FC OTAs are extensively analyzed for achieving high gain, high slew rate, and high unity gain bandwidth. In [1,2], the FC OTA uses current recycling to enhance transconductance, gain, bandwidth, and slew rate. In [3,4], an improved recycling structure of a folded cascode amplifier (IRFC) enhanced the transconductance and unity gain bandwidth by separating AC and DC currents. An RFC OTA with increase in transconductance and output impedance by using positive feedback was presented in [5], while the works in [6,7] employed phase network and additional current sources to improve the performance of RFC. In [8], an RFC OTA with current steering positive feedback was presented for enhancing the DC gain. In [9], an adaptive improved recycling folded cascode amplifier with improved gain, high slew rate, high phase margin, and reduced power consumption was discussed. In [10], a self bias cascode current mirror with frequency compensation is utilized for enhancing the phase margin of the RFC OTA. In [11], the FC OTA was * Correspondence: kumaravel.s@vit.ac.in This work is licensed under a Creative Commons Attribution 4.0 International License.
implemented for achieving higher DC gain and unity gain bandwidth with low power consumption using the enhanced recycling technique by operating all the transistors in the subthreshold region.
The existing architectures of FC and RFC OTAs are discussed in Section 2 of the paper. Section 3 describes the architecture and analysis of the proposed MRFC OTA. Simulation results and the conclusion are presented in Sections 4 and 5, respectively.

Conventional FC and RFC OTAs
The operation of FC and RFC OTAs existing in the literature is reproduced here for the sake of clarity. Figure 1 and Figure 2 show the conventional FC and RFC amplifiers, respectively. In the conventional FC OTA, transistors M3 and M4 conduct high current and exhibit high transconductance. Since their role is limited to providing a folded node, they do not contribute to the overall transconductance of the OTA. To utilize transistors M3 and M4 in a contribution for transconductance of the OTA, a modified FC OTA is proposed and referred to as a recycling folded cascode OTA [2]. In the RFC OTA, input transistors M1 and M2 are split into four transistors, M1a, M1b, M2a, and M2b, which carry equal currents. Additionally, current mirrors M3a, M3b and M4a, M4b are formed by modifying the M3 and M4 transistors separately with a currentcarrying ratio of k :1. The crossover connections shown in Figure 2 ensure the in-phase addition of small signal currents at the sources of M5 and M6, respectively. Moreover, transistors M11 and M12 are added to the current mirrors to ensure equal drain potentials of M3a and M3b and of M4a and M4b, respectively. From [2], it is observed that the effective transconductance (G m ) of the FC and RFC is given by: Eq. (2) suggests that the increase in gain bandwidth product is because of enhancement in overall transconductance. However, the phase margin is degraded by the large value of k . For k =3, the transconductance of the RFC is double that of the FC and hence the gain and gain bandwidth (GBW) of the RFC are also doubled.

Architecture of the proposed amplifier
In [2], the RFC is implemented to improve the DC gain and UGB (unity gain bandwidth) with low power compared to the FC OTA. Furthermore, to increase the gain and to provide separate paths for AC and DC

DC Gain
The low-frequency gain of an OTA is expressed as: The DC gain can be increased either by increasing effective transconductance or by output impedance or both in an OTA.

Transconductance ( G m ) enhancement
The effective transconductance ( G mM RF C ) of the MRFC OTA shown in Figure 3 is obtained from a half circuit transistor model and small signal equivalent model of the MRFC as depicted in Figure 4 and Figure 5, respectively. The small signal analysis is done from loop 1 and loop 2 with different node voltages V A , V gs3a , and V out at nodes A and B and output, respectively, as shown in Figure 5. Effective transconductance is found by shorting V out to the ground and assuming I S current into the output node.
The equivalent transconductance can be expressed as the ratio of short circuit current ( I S ) to the input voltage ( V in ).
As shown in Figure 5, from loop 1, and from loop 2, Substituting Eq. (4) in (5) results in: Since the currents flowing through M1a and M2b are in the ratio x : (1 − x), their transconductances are in the same ratio. The current flowing through M3b is mirrored by a factor of (1 + x) : y into M3a and hence the ratio of their transconductance is (1 + x) : y . The transconductance ratio of M9 and M3b is u : y . By substituting all the current ratios in Eq. (6), the effective transconductance of the proposed amplifier is expressed as: where g m1a is the transconductance of input transistor M1a. Eq. (7) depicts the increase in transconductance of the proposed amplifier when compared to the FC and RFC amplifiers.

Output impedance
In [5], to enhance the output impedance of the RFC OTA [2], positive feedback is implemented in the amplifier architecture by driving the gate terminal of the M7 and M8 output transistors from the folded node. The same methodology is adopted for the IRFC OTA [3] in this paper. The half circuit analysis for deriving the expression for the output impedance of the MRFC OTA is shown in Figure 6. The output impedance is expressed as a parallel combination of R N and R P , where R N and R P are the equivalent impedances looking into drains of M5 and M7, respectively. Using basic Kirchhoff current laws and a small signal equivalent model, impedances R N and R P can be expressed as: Therefore, the low-frequency output impedance of the proposed amplifier using Eqs. (8) and (9) can be expressed as: Similarly, the output impedance of the FC and RFC OTAs can be expressed as: where r 0i is drain-to-source resistance of transistor i and g mi is the transconductance of corresponding transistor i.
From Eq. (10) it is found that the output impedance of MRFC is very high compared to the FC and RFC OTAs. With these modifications, an enhancement of 10-20 dB gain is expected compared to the FC and RFC configurations.

Frequency response
The frequency response of the MRFC OTA is derived from its high-frequency half circuit equivalent shown in Figure 7. The circuit consists of 4 nodes named A, B, C, and D at the drains of M1a, M2b, M9, and M5, respectively. The voltages associated with each node are labeled as V A , V gs3a , V C , and V out− . It is observed from Figure 6 that the amplifier is exhibiting 3 zeros and 4 poles. Two poles and one zero are considered for studying the frequency response, while the other poles and zeros have been neglected, assuming that they exist at a very high frequency when compared to dominant poles.

Dominant pole
The pole that is closer to the origin is considered to be the dominant pole. Since output node D is connected with high output impedance R out,M RF C and large load capacitance C L , it contributes to a dominant pole. The pole frequency is expressed as: where

Nondominant pole:
The nondominant pole occurs in cascode node A, i.e. the drain of M1a is at a very high frequency in contrast to the dominant pole. This nondominant pole frequency can be expressed as: where R 2 ∼ = r o1a ∥ r o3a ∥ r o5 ∥ 1 gm5 and C 2 ∼ = C db1a + C db3a + C gb8 + C sb5 + C gs5 .

Zero
The existence of the feedforward path for the input signal through C gd1a introduces a zero in the transfer function. The frequency of this zero is given as:

Unity gain bandwidth:
The unity gain bandwidth (UGB) of an OTA is expressed as: From Eqs. (7), (10), and (13), x.y With Eq. (17) it is inferred that the proper selection of x , y , u will lead to enhanced UGB of the proposed amplifier compared to FC and RFC configurations.

Noise
Noise has become the limiting factor in analog systems, especially when implemented for biomedical applications.
In this section noise expressions for FC, RFC, and MRFC OTAs are derived. The extreme noise current measured at the output of a single MOSFET is expressed as: The first term in Eq. (18) corresponds to thermal equivalent noise, while the latter represents the flicker noise component. To simplify the analysis, the thermal and flicker noise components are separately found and examined. The transistors that contribute more noise in the circuit include M1a, M2a, M1b, M2b, M3a, M3b, M9, and M10. The other transistors contribute comparatively less noise current. The input referred thermal noise component of the FC, RFC, and MRFC OTA is expressed as: The input referred flicker noise component of three amplifiers can be expressed as: where ψ = 1 + (1−x).(u+x+1) x.y Comparing Eqs.  (24), it is found that the flicker noise of MRFC is smaller than that of its counterparts FC and RFC. This reduction is observed due to an increase in the overall transconductance of MRFC.

Slew rate
Slew rate is the design parameter that affects the settling time of OTAs. Slew rate is derived by assuming capacitive load C L and applying a large signal at the inputs of the amplifier. When Vin+ in Figure 3 goes high, M1a and M1b are turned off. This increases the drain voltage of M4a, which leads M6 to be turned off while M2a is driven into the deep triode region. Consequently, tail current 2I B flows through M2b and part of the same flows through the DC path M3c, M11b in a ratio of (1 − x) : z , and the remaining goes through M3b and is mirrored into M3a by a factor of (1 + x) : y and by a factor of z : y into C L , respectively. As a result, the current through load capacitor C L is increased. Hence, the slew rate of MRFC is increased. The slew rate expressions for the FC, RFC, and MRFC OTAs are: Eq. (27) ensures that the proper selection of x , y , z , and u leads to an enhanced slew rate for the proposed OTA compared to FC and RFC configurations.

Input offset voltage
Amplifiers exhibit a finite output voltage even for zero input conditions, leading to either systematic or random deformities termed as "offset". Systematic offset results because of the improper selection of amplifier design or inappropriate quiescent operating points of active devices. The random offset is due to process variations or mismatched devices. The offset voltage is the minimum amount of input voltage required to make the output zero. Using Pelgrom's mismatch model as in [12,13], the input offset voltage of a device can be expressed as: where A V T is the area proportionality constant for threshold voltage V T and is provided by the process technology.

Performance comparison of FC, RFC, and MRFC OTAs
Three OTA configurations of FC, RFC, and MRFC are implemented using the UMC 180 nm CMOS process for a bias current of 300 µ A with a supply voltage of 1.  Table 1 illustrates the device sizes used for implementing the FC, RFC, and MRFC amplifier configurations.
For ease of implementation, the length of all the transistors is fixed at 500 nm [14][15][16]. For the slew rate, a large step of 1.8 V P P at 1 MHz is applied to the amplifiers and responses are illustrated in Figure 9. The slew rates of the three configurations are 13.85 V/ µ s, 40.6 V/ µ s, and 64.05 V/ µ s, respectively.
It shows that the slew rate of the MRFC OTA is improved by 5 times compared to FC and 1.6 times compared to RFC. The noise performance of FC, RFC, and MRFC are characterized by simulation. The spectral density of input referred noise of all three configurations are illustrated in Figure 10. The integrated input referred noise for a frequency range of 1 Hz to 100 MHz for FC, RFC, and the proposed amplifier are 220.4 µV rms , 201.3 µV rms , and 139.2 µV rms , respectively.
For the offset calculation, the circuit has been connected in voltage follower mode and the difference between two input nodes is measured. The offset standard deviation of the MRFC OTA is found to be in line with the FC and RFC OTAs. The layout of the proposed amplifier is developed and it is found that the area occupied by the MRFC OTA is 2760 µm 2 , which is smaller than the other two configurations. The layout of the MRFC is illustrated in Figure 11.  Furthermore, to study the robustness of the proposed amplifier against mismatch and process spreads, Monte Carlo simulations of all three configurations are carried out for 1000 runs to find the offset, as illustrated in Figure 12. Figure 13 shows the effects of various process corners (TT, SS, and FF) on the frequency response of the proposed OTA.

Performance comparison of IRFC and MRFC amplifiers
In order to validate the proposed enhancements in MRFC, the IRFC architecture discussed in [8] is simulated using UMC 180 nm CMOS for a bias current of 300 µ A with a supply voltage of 1.8 V. Simulations are conducted on the assumption that x, y , and z of the MRFC are equivalent to p , α(1 − p) , and β(1 − p) of IRFC reported in [3], while u is equivalent to K − 1 of IRFC in [8]. For simulation purposes, MRFC's x , y ,    z , and u are considered to be respectively 0.5, 0.25, 0.25, and 2 while IRFC's K and a are assumed to be 3 and 0.25. Table 2 shows the operating points of transistors used in the architectures of FC, RFC, IRFC, and MRFC. The comparison between IRFC and MRFC in terms of effective transconductance, output impedance, and DC gain is reported in Table 3. The results of the simulation show that the effective transconductance and output impedance of the proposed MRFC architecture is increased by approximately 746 µ S and 712 K Ω , respectively. This improvement in effective transconductance and output impedance resulted in an increase of 6 dB in DC gain.
The performance summary of simulated results including commonly used figures of merit F oM 1 and F oM 2 are given in Table 4. The expressions for F oM 1 and F oM 2 are: .(r 01a ∥r 03a )∥g m7 .r 07 .r 09 ∼ = r 07 .(g m7 + g mb7 ).

DC gain
x.y From Table 4, it is observed that the proposed MRFC OTA has high FoMs compared to FC, RFC, and other OTAs considered from the literature survey.

Conclusion
A modified version of an improved recycling folded cascode OTA is presented in this paper. Compared to FC, RFC, and IRFC OTAs, the designed circuit exhibits better performance in terms of transconductance, DC gain, slew rate, noise, and UGB, thus resulting in better FoMs with the same power consumption. The enhancement in DC gain is achieved by employing positive feedback at the cascode node. Since the proposed amplifier exhibits reduced input referred noise compared to FC and RFC OTAs, this can be used as a preamplifier in biomedical applications. The input offset of the MRFC is also aligned with FC and RFC. The responses of the proposed amplifier at various corners are found to be well matched.