Balkan Journal of Electrical and Computer Engineering 2147-284X 2147-284X MUSA YILMAZ 10.17694/bajece.1096188 Electrical Engineering Elektrik Mühendisliği Reduction of Output Impedance of Buck Converter with Genetic Algorithm https://orcid.org/0000-0002-5928-0807 Asadi Farzin MALTEPE ÜNİVERSİTESİ 07 30 2022 10 3 317 322 03 31 2022 07 18 2022 Copyright © 2013, Balkan Journal of Electrical and Computer Engineering 2013 Balkan Journal of Electrical and Computer Engineering

This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control (VMC) without requiring low Equivalent Series Resistance (ESR) output capacitors. Proposed technique uses the infinity norm ( ) to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm (GA). The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode (CCM). Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.

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