Research Article

Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA

Volume: 14 October 28, 2026
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Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA

Abstract

Rotor-flux estimation on FPGA requires attention to both estimation accuracy and hardware resources. This study implements sliding-mode mean-square (SMMS) and sliding-mode mean-module (SMMM) filters for an induction motor and compares them with a Kalman–Bucy (KB) implementation. The continuous-time filter equations are realized as fixed-point updates using recorded electrical signals and measured rotor speed. Software Monte Carlo analysis is followed by separate FPGA experiments in which a stochastic motor reference model and one estimator operate concurrently. Software evaluation uses model-generated stator currents, whereas the FPGA experiments feed the estimators with replayed measured currents from the same recorded operating interval. The comparison shows that the relative accuracy of the estimators varies with the noise level: the sliding mode filters achieve lower errors across several tested conditions while requiring fewer logic resources than KB. FPGA outputs were recorded under the tested laboratory conditions, although post-fit timing analysis did not establish closure at the specified base-clock constraint.

Keywords

References

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Details

Primary Language

English

Subjects

Electrical Engineering (Other)

Journal Section

Research Article

Publication Date

October 28, 2026

Submission Date

September 30, 2026

Acceptance Date

October 16, 2026

Published in Issue

Year 2026 Volume: 14

APA
Kızmaz, H., & Aksoy, S. (2026). Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA (T. C. Akıncı & H. Nazaripouya, Trans.). Balkan Journal of Electrical and Computer Engineering, 14, 323-333. https://doi.org/10.17694/bajece.2051336
AMA
1.Kızmaz H, Aksoy S. Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA. Balkan Journal of Electrical and Computer Engineering. 2026;14:323-333. doi:10.17694/bajece.2051336
Chicago
Kızmaz, Hakan, and Saadettin Aksoy. 2026. “Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA”. Translated by Tahir Cetin Akıncı and Hamidreza Nazaripouya. Balkan Journal of Electrical and Computer Engineering 14 (October): 323-33. https://doi.org/10.17694/bajece.2051336.
EndNote
Kızmaz H, Aksoy S (October 1, 2026) Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA. Balkan Journal of Electrical and Computer Engineering 14 323–333.
IEEE
[1]H. Kızmaz and S. Aksoy, “Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA”, Balkan Journal of Electrical and Computer Engineering, vol. 14, pp. 323–333, Oct. 2026, doi: 10.17694/bajece.2051336.
ISNAD
Kızmaz, Hakan - Aksoy, Saadettin. “Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA”. Balkan Journal of Electrical and Computer Engineering. Trans. Tahir Cetin Akıncı - Hamidreza Nazaripouya 14 (October 1, 2026): 323-333. https://doi.org/10.17694/bajece.2051336.
JAMA
1.Kızmaz H, Aksoy S. Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA. Balkan Journal of Electrical and Computer Engineering. 2026;14:323–333.
MLA
Kızmaz, Hakan, and Saadettin Aksoy. “Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA”. Balkan Journal of Electrical and Computer Engineering, translated by Tahir Cetin Akıncı and Hamidreza Nazaripouya, vol. 14, Oct. 2026, pp. 323-3, doi:10.17694/bajece.2051336.
Vancouver
1.Hakan Kızmaz, Saadettin Aksoy. Hardware Realization and Resource Analysis of Continuous-Time Sliding Mode State Estimators on FPGA. Balkan Journal of Electrical and Computer Engineering. 2026 Oct. 1;14:323-3. doi:10.17694/bajece.2051336

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