The Runge Kutta-4 based 4D Hyperchaotic System Design for Secure Communication Applications

Abstract

It is a common fact that warranting high security is the leading isssue in the communication systems. Since there will always be possible threats in attacking the communication channels, the trends to determine a suitable method to quarantee high security for communication systems will continue. This paper presents an FPGA-based 4-D hyper chaotic system to be utilized in the communication systems. Since the system has 9 terms two of which are nonlinear, it is one of the among simplest 4-D hyper chaotic systems. The fourth order Runge-Kutta numeric algorithm (RK4) has been utilized to obtain the discrete time tantamount of the given hyper chaotic system. IEEE 32-bit 754-1985 floating point representation of single precision has been used for defining the numbers. The whole design has been coded in Very High –Speed Integrated Circuit Hardware Description Language (VHDL). The implemented hyper chaotic system has been simulated and synthesised by utilizing Xilinx ISE Design Tools 14.7 simulation software in a Xilinx Virtex-7 XC7VX330T chip. After the Place-Route process, the statistics of chip area consumption and the clock frequency parameters have been got and analyzed. Finally, the maximum clock frequency of the 4-D hyper chaotic oscillator reaches 350.733 MHz so the proposed design can be utilized as a chaotic oscillator in enhancing chaos-based communication systems on FPGA.

Keywords

• Runge-Kutta algorithm,4-D Hyper chaotic system,FPGA,Secure Communication

References

1. Akgul, A., 2017 An electronic card for easy circuit realisation of complex nonlinear systems. Electron.World 124: 29–31.
2. Akgul, A., H. Calgan, I. Koyuncu, I. Pehlivan, and A. Istanbullu, 2016 Chaos-based engineering applications with a 3d chaotic system without equilibrium points. Nonlinear dynamics 84: 481–495.
3. Alçın, M., ˙I. Pehlivan, and ˙I. Koyuncu, 2016 Hardware design and implementation of a novel ann-based chaotic generator in fpga. Optik 127: 5500–5505.
4. Alçın, M., M. Tuna, and ˙I. Koyuncu, 2018 Iq-math based designing of fourth order runge-kutta algorithm on fpga and performance analysis according to ann approximation .
5. Avaroglu, E., I. Koyuncu, A. B. Özer, and M. Türk, 2015a Hybrid pseudo-random number generator for cryptographic systems.Nonlinear Dynamics 82: 239–248.
6. Avaroglu, E., T. Tuncer, A. B. Özer, B. Ergen, and M. Türk, 2015b A novel chaos-based post-processing for trng. Nonlinear Dynamics 81: 189–199.
7. Bonilla, L. L., M. Alvaro, and M. Carretero, 2016 Chaos-based true random number generators. Journal of Mathematics in Industry 7: 1–17.
8. Elmanfaloty, R. A. and E. Abou-Bakr, 2019 Random property enhancement of a 1d chaotic prng with finite precision implementation. Chaos, Solitons & Fractals 118: 134–144.

9. Jahanshahi, H., K. Rajagopal, A. Akgul, N. N. Sari, H. Namazi, et al., 2018 Complete analysis and engineering applications of a megastable nonlinear oscillator. International Journal of Non- Linear Mechanics 107: 126–136.
10. Kocamaz, U. E., S. Çiçek, and Y. Uyaro˘ glu, 2018 Secure communication with chaos and electronic circuit design using passivitybased synchronization. Journal of Circuits, Systems and Computers 27: 1850057.
11. Koyuncu, I., 2016 Design and implementation of high speed artificial neural network based sprott 94 s system on fpga. International Journal of Intelligent Systems and Applications in Engineering 4: 33–39.
12. Koyuncu, I. and A. T. Özcerit, 2017 The design and realization of a new high speed fpga-based chaotic true random number generator. Computers & Electrical Engineering 58: 203–214.
13. Koyuncu, I., A. T. Ozcerit, I. Pehlivan, et al., 2013 An analog circuit design and fpga-based implementation of the burke-shaw chaotic system. Optoelectronics and Advanced Materials-Rapid Communications 7: 635–638.
14. Koyuncu, ˙I. and H. ˙I. ¸Seker, 2019 Implementation of dormandprince based chaotic oscillator designs in different iq-math number standards on fpga. Sakarya Üniversitesi Fen Bilimleri Enstitüsü Dergisi 23: 859–868.
15. Koyuncu, I., M. Tuna, I. Pehlivan, C. B. Fidan, and M. Alçın, 2020 Design, fpga implementation and statistical analysis of chaosring based dual entropy core true random number generator.
16. Analog Integrated Circuits and Signal Processing 102: 445–456. Lai, Q., X.-W. Zhao, K. Rajagopal, G. Xu, A. Akgul, et al., 2018
17. Dynamic analyses, fpga implementation and engineering applications of multi-butterfly chaotic attractors generated from generalised sprott c system. Pramana 90: 6.
18. Liu, Y., S. Pang, and D. Chen, 2013 An unusual chaotic system and its control. Mathematical and computer modelling 57: 2473– 2493.
19. Murillo-Escobar, M., C. Cruz-Hernández, L. Cardoza-Avendaño, and R. Méndez-Ramírez, 2017 A novel pseudorandom number generator based on pseudorandomly enhanced logistic map. Nonlinear Dynamics 87: 407–425.
20. Pamuk, N., 2013 Determination of chaotic time series in dynamic systems. Journal of Balikesir University Institute of Science and Technology 15: 77–91.
21. Pehlivan, ˙I., E. Kurt, Q. Lai, A. Basaran, and M. C. Kutlu, 2019 A multiscroll chaotic attractor and its electronic circuit implementation. Chaos Theory and Applications 1: 29–37.
22. Pehlivan, I. and W. Zhouchao, 2012 Analysis, nonlinear control, and chaos generator circuit of another strange chaotic system. Turkish Journal of Electrical Engineering and Computer Science 20: 1229–1239.
23. Prakash, P., K. Rajagopal, I. Koyuncu, J. P. Singh, M. Alcin, et al., 2020 A novel simple 4-d hyperchaotic system with a saddlepoint index-2 equilibrium point and multistability: Design and fpga-based applications. Circuits, Systems, and Signal Processing pp. 1–22.
24. Rajagopal, K., A. Akgul, S. Jafari, A. Karthikeyan, and I. Koyuncu, 2017 Chaotic chameleon: Dynamic analyses, circuit implementation, fpga design and fractional-order form with basic analyses. Chaos, Solitons & Fractals 103: 476–487.
25. Rajagopal, K., S. Jafari, A. Karthikeyan, A. Srinivasan, and B. Ayele, 2018 Hyperchaotic memcapacitor oscillator with infinite equilibria and coexisting attractors. Circuits, Systems, and Signal Processing 37: 3702–3724.
26. Rajagopal, K., M. Tuna, A. Karthikeyan, ˙I. Koyuncu, P. Duraisamy, et al., 2019 Dynamical analysis, sliding mode synchronization of a fractional-order memristor hopfield neural network with parameter uncertainties and its non-fractional-order fpga implementation. The European Physical Journal Special Topics 228: 2065–2080.
27. Rashtchi, V. and M. Nourazar, 2015 Fpga implementation of a realtime weak signal detector using a duffing oscillator. Circuits, Systems, and Signal Processing 34: 3101–3119.
28. Tlelo-Cuautle, E., A. Pano-Azucena, J. Rangel-Magdaleno, V. Carbajal-Gomez, and G. Rodriguez-Gomez, 2016 Generating a 50-scroll chaotic attractor at 66 mhz by using fpgas. Nonlinear dynamics 85: 2143–2157.
29. Tuna, M., M. Alçın, ˙I. Koyuncu, C. B. Fidan, and ˙I. Pehlivan, 2019a High speed fpga-based chaotic oscillator design. Microprocessors and Microsystems 66: 72–80.
30. Tuna, M. and C. B. Fidan, 2016 Electronic circuit design, implementation and fpga-based realization of a new 3d chaotic system with single equilibrium point. Optik 127: 11786–11799.
31. Tuna, M. and C. B. Fidan, 2018 A study on the importance of chaotic oscillators based on fpga for true random number generating (trng) and chaotic systems. Journal of the Faculty of Engineering and Architecture of Gazi University 33: 469–486.
32. Tuna, M., A. Karthikeyan, K. Rajagopal, M. Alcin, and ˙I. Koyuncu, 2019b Hyperjerk multiscroll oscillators with megastability: Analysis, fpga implementation and a novel ann-ring-based true random number generator. AEU-International Journal of Electronics and Communications 112: 152941.
33. Tuncer, T., 2016 The implementation of chaos-based puf designs in field programmable gate array. Nonlinear dynamics 86: 975–986.
34. Tuncer, T. and E. Avaroglu, 2017 Random number generation with lfsr based stream cipher algorithms. In 2017 40th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), pp. 171–175, IEEE.
35. Vaidyanathan, S., I. Pehlivan, L. G. Dolvis, K. Jacques, M. Alcin, et al., 2020 A novel ann-based four-dimensional two-disk hyperchaotic dynamical system, bifurcation analysis, circuit realisation and fpga-based trng implementation. International Journal of Computer Applications in Technology 62: 20–35.
36. Xu, G., Y. Shekofteh, A. Akgül, C. Li, and S. Panahi, 2018 A new chaotic system with a self-excited attractor: entropy measurement, signal encryption, and parameter estimation. Entropy 20: 86.
37. Zhang, Y., Z. Liu, and X. Zheng, 2008 A chaos-based image encryption asic using reconfigurable logic. In APCCAS 2008-2008 IEEE Asia Pacific Conference on Circuits and Systems, pp. 1782–1785, IEEE.
38. Zuppa, L. A., 2010 Chaotic logistic map implementation in the pic12f629 microcontroller unit. IFAC Proceedings Volumes 43: 167–170.