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Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures

Yıl 2017, Cilt: 30 Sayı: 3, 273 - 280, 20.09.2017

Öz

In this study,
Al/HfO2/p-Si (MIS) structures were prepared by using the sol-gel
method for three different annealing temperatures.  The current-voltage (I-V) and
capacitance-voltage (C-V) characteristics of these structures were investigated
by taking into consideration the effect of the interfacial insulator layer and
surface states (Nss) at room temperature. All of the structures showed
non-ideal I-V behaviour with ideality factor (n) in the range between 2.35 and
4.42 owing to interfacial insulator layer and surface states. The values of Nss
and barrier height (
fb) for three samples were calculated. The values of n and Nss
ascend with increasing the insulator layer thickness (δ) while the values of
fb decreases. 

Kaynakça

  • [1] Sze, S. M., Kwok, K. Ng., Physics of Semiconductor Devices, John Wiley, New Jersey, USA, (2007).
  • [2] Card, H. C., Rhoederick, E. H., “Studies of tunnel MOS diodes I. Interface effects in silicon Schottky diodes”, J. Phys. D, 4: 1589, (1971).
  • [3] Chattopadhyay, P., Daw, A. N., “On the current transport mechanism in a metal - insulator - semiconductor (MIS) diode”. Solid-State Electron., 29: 555-560, (1986).
  • [4] Turut, A., Karabulut, A., Ejderha, K., Bıyıklı, N., “Capacitance - conductance characteristics of Au/Ti/Al2O3/n-GaAs structures with very thin Al2O3 interfacial layer”, Materials Res. Expr., 2: 046301, (2015).
  • [5] Turut, A., Dogan, H., Yıldırım, N., “The interface state density characterization by temperature-dependent capacitance – conductance - frequency measurements in Au/Ni/n-GaN structures”, Materials Res. Expr., 2: 096304, (2015).
  • [6] Szatkowski, J., Sireanski, K., “Interface effects on Mg-Zn3P2 Schottky diodes”, Solid-State Electron., 31: 257, (1988).
  • [7] Turut, A., Yalçın, N., Sağlam, M., “Parameter extraction from non-ideal C−V characteristics of a Schottky diode with and without interfacial layer”, Solid-State Electron., 35: 835, (1992).
  • [8] Serin, T., Serin, N., Karadeniz, S., Sarı, H., Tugluoglu, N., Pakma, O., “Electrical, structural and optical properties of SnO2 thin films prepared by spray pyrolysis”, J. Non-Cryst. Sol., 352(3): 209, (2006).
  • [9] Liu, Q. J., Yao, H., Wang, L., Hou, C. R., Zhao, W. Y., “Translocation of Gold Nanorod Through a Solid-State Nanopore”, Science of Adv. Mater., 6(9): 2075 - 2078, (2014).
  • [10] Pakma, O., Serin, N., Serin, T., “The effect of repeated annealing temperature on the structural, optical, and electrical properties of TiO2 thin films prepared by dip-coating sol–gel method”, J. Matt. Sci., 44(2): 401 - 407, (2009).
  • [11] Wei, H. H., He, G., Liu, M., Liu, Y. M., Zhang, M., Chen, X. S., Sun, Z. Q., “Interfacial Control and Modulation of Band Alignment of Atomic Layer Deposition-Derived HfO2/Si Gate Stack by Rapid Thermal Annealing”, Science of Adv. Mater., 6(12): 2652 - 2658, (2014).
  • [12] Zhu, H., Tang, C., Fonseca, L. R. C., Ramprasad, R., “Recent progress in ab initio simulations of hafnia-based gate stacks”, J Mater Sci., 47: 7399–7416, (2012).
  • [13] Kern, W., Handbook of Semiconductor Cleaning Technology, Noyes, New York, USA, (1993).
  • [14] Cowley, A. M., Sze, S. M., “Surface States and Barrier Height of Metal‐Semiconductor Systems”, J. Appl. Phys., 36: 3212, (1965).
  • [15] Fonash, S. J., “A reevaluation of the meaning of capacitance plots for Schottky‐barrier‐type diodes”, J. Appl. Phys., 54: 4, (1983).
  • [16] Nicollian, E. H., Brews, J. R., Metal-Oxide Semiconductor (MOS) Physics and Technology, Wiley, New York, USA, (1982).
  • [17] Balog, M., Schieber, M., Michman, M., Patai, S., “Chemical vapor deposition and characterization of HfO2 films from organo-hafnium compounds”, Thin Solid Films, 41(3): 247, (1977).
  • [18] Housa, M., High k Gate Dielectrics, CRC Press, Boca Raton, USA, (2003).
  • [19] Altındal, S., Kanbur, H., Tataroğlu, A., Bülbül, M. M., “The barrier height distribution in identically prepared Al/p-Si Schottky diodes with the native interfacial insulator layer (SiO2)“, Physica B, 399: 146, (2007).
  • [20] Özer, M.,D., Yıldız, E., Altındal, S., Bülbül, M. M., “Temperature dependence of characteristic parameters of the Au/SnO2/n-Si (MIS) Schottky diodes”, Solid State Electron., 51: 941-949, (2007).
Yıl 2017, Cilt: 30 Sayı: 3, 273 - 280, 20.09.2017

Öz

Kaynakça

  • [1] Sze, S. M., Kwok, K. Ng., Physics of Semiconductor Devices, John Wiley, New Jersey, USA, (2007).
  • [2] Card, H. C., Rhoederick, E. H., “Studies of tunnel MOS diodes I. Interface effects in silicon Schottky diodes”, J. Phys. D, 4: 1589, (1971).
  • [3] Chattopadhyay, P., Daw, A. N., “On the current transport mechanism in a metal - insulator - semiconductor (MIS) diode”. Solid-State Electron., 29: 555-560, (1986).
  • [4] Turut, A., Karabulut, A., Ejderha, K., Bıyıklı, N., “Capacitance - conductance characteristics of Au/Ti/Al2O3/n-GaAs structures with very thin Al2O3 interfacial layer”, Materials Res. Expr., 2: 046301, (2015).
  • [5] Turut, A., Dogan, H., Yıldırım, N., “The interface state density characterization by temperature-dependent capacitance – conductance - frequency measurements in Au/Ni/n-GaN structures”, Materials Res. Expr., 2: 096304, (2015).
  • [6] Szatkowski, J., Sireanski, K., “Interface effects on Mg-Zn3P2 Schottky diodes”, Solid-State Electron., 31: 257, (1988).
  • [7] Turut, A., Yalçın, N., Sağlam, M., “Parameter extraction from non-ideal C−V characteristics of a Schottky diode with and without interfacial layer”, Solid-State Electron., 35: 835, (1992).
  • [8] Serin, T., Serin, N., Karadeniz, S., Sarı, H., Tugluoglu, N., Pakma, O., “Electrical, structural and optical properties of SnO2 thin films prepared by spray pyrolysis”, J. Non-Cryst. Sol., 352(3): 209, (2006).
  • [9] Liu, Q. J., Yao, H., Wang, L., Hou, C. R., Zhao, W. Y., “Translocation of Gold Nanorod Through a Solid-State Nanopore”, Science of Adv. Mater., 6(9): 2075 - 2078, (2014).
  • [10] Pakma, O., Serin, N., Serin, T., “The effect of repeated annealing temperature on the structural, optical, and electrical properties of TiO2 thin films prepared by dip-coating sol–gel method”, J. Matt. Sci., 44(2): 401 - 407, (2009).
  • [11] Wei, H. H., He, G., Liu, M., Liu, Y. M., Zhang, M., Chen, X. S., Sun, Z. Q., “Interfacial Control and Modulation of Band Alignment of Atomic Layer Deposition-Derived HfO2/Si Gate Stack by Rapid Thermal Annealing”, Science of Adv. Mater., 6(12): 2652 - 2658, (2014).
  • [12] Zhu, H., Tang, C., Fonseca, L. R. C., Ramprasad, R., “Recent progress in ab initio simulations of hafnia-based gate stacks”, J Mater Sci., 47: 7399–7416, (2012).
  • [13] Kern, W., Handbook of Semiconductor Cleaning Technology, Noyes, New York, USA, (1993).
  • [14] Cowley, A. M., Sze, S. M., “Surface States and Barrier Height of Metal‐Semiconductor Systems”, J. Appl. Phys., 36: 3212, (1965).
  • [15] Fonash, S. J., “A reevaluation of the meaning of capacitance plots for Schottky‐barrier‐type diodes”, J. Appl. Phys., 54: 4, (1983).
  • [16] Nicollian, E. H., Brews, J. R., Metal-Oxide Semiconductor (MOS) Physics and Technology, Wiley, New York, USA, (1982).
  • [17] Balog, M., Schieber, M., Michman, M., Patai, S., “Chemical vapor deposition and characterization of HfO2 films from organo-hafnium compounds”, Thin Solid Films, 41(3): 247, (1977).
  • [18] Housa, M., High k Gate Dielectrics, CRC Press, Boca Raton, USA, (2003).
  • [19] Altındal, S., Kanbur, H., Tataroğlu, A., Bülbül, M. M., “The barrier height distribution in identically prepared Al/p-Si Schottky diodes with the native interfacial insulator layer (SiO2)“, Physica B, 399: 146, (2007).
  • [20] Özer, M.,D., Yıldız, E., Altındal, S., Bülbül, M. M., “Temperature dependence of characteristic parameters of the Au/SnO2/n-Si (MIS) Schottky diodes”, Solid State Electron., 51: 941-949, (2007).
Toplam 20 adet kaynakça vardır.

Ayrıntılar

Bölüm Physics
Yazarlar

Şadan Özden 0000-0003-0716-9194

Osman Pakma Bu kişi benim

Yayımlanma Tarihi 20 Eylül 2017
Yayımlandığı Sayı Yıl 2017 Cilt: 30 Sayı: 3

Kaynak Göster

APA Özden, Ş., & Pakma, O. (2017). Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures. Gazi University Journal of Science, 30(3), 273-280.
AMA Özden Ş, Pakma O. Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures. Gazi University Journal of Science. Eylül 2017;30(3):273-280.
Chicago Özden, Şadan, ve Osman Pakma. “Interface Effects of Annealing Temperatures in Al/HfO2/P-Si (MIS) Structures”. Gazi University Journal of Science 30, sy. 3 (Eylül 2017): 273-80.
EndNote Özden Ş, Pakma O (01 Eylül 2017) Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures. Gazi University Journal of Science 30 3 273–280.
IEEE Ş. Özden ve O. Pakma, “Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures”, Gazi University Journal of Science, c. 30, sy. 3, ss. 273–280, 2017.
ISNAD Özden, Şadan - Pakma, Osman. “Interface Effects of Annealing Temperatures in Al/HfO2/P-Si (MIS) Structures”. Gazi University Journal of Science 30/3 (Eylül 2017), 273-280.
JAMA Özden Ş, Pakma O. Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures. Gazi University Journal of Science. 2017;30:273–280.
MLA Özden, Şadan ve Osman Pakma. “Interface Effects of Annealing Temperatures in Al/HfO2/P-Si (MIS) Structures”. Gazi University Journal of Science, c. 30, sy. 3, 2017, ss. 273-80.
Vancouver Özden Ş, Pakma O. Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures. Gazi University Journal of Science. 2017;30(3):273-80.