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Implementation of Two Cell Non-Autonomous CNN Model on FPGA

Yıl 2018, Cilt: 13 Sayı: 1, 25 - 29, 01.03.2018

Öz

This
paper presents implementation of a chaotic Cellular Neural Network (CNN) on
Field Programmable Gate Array (FPGA). The network has two non-autonomous cells
and exhibits chaotic behavior. In the implementation stage, Verilog Hardware
Description Language (HDL) is used and discrete time model of the network is
coded on Xilinx ISE Design Suite 13.2. It seems that the chaotic attractor can
be used as entropy source or short key (seed) of chaos based random number
generator design.

Kaynakça

  • 1. Strogatz S.H., Herbert D.E., (1996). Nonlinear dynamics and chaos. Medical Physics-New York-Institute of Physics, 23(6), 993-995. 2. Natsheh A.N., Al-Habibah E.M.S., (2015). Chaos control DC-DC boost converter by FPGA. 2015 IEEE 42nd Photovoltaic Specialist Conference (PVSC), New Orleans, LA, 1-6. 3. Hidalgo R.M., Fernndez J.G., Rivera R.R., Larrondo H.A., (2001). Versatile dsp-based chaotic communication system. Electronic Letters, 37, 1204–1205. 4. Ali-Pacha A., Said N.H., M’Hamed A., Belgoraf A., (2007). Lorenz’s attractor applied to the stream cipher (alipacha generator). Chaos, Solitons and Fractals, 33(5), 1762-1766. 5. Mazzini G., Setti G., Rovatti R., (1997). Chaotic complex spreading sequences for aynhchronous ds-cdma-part 1: System modeling and results. IEEE Trans. Circuits Sys. 1, 44(10), 937–947. 6. Setti G., Balestra M., Rovatti R., (2000). Experimental verification of enhanced electromagnetic compatibility in chaotic fm clock signals. in Proceedings of ISCAS’00. IEEE Circuits and Systems Society, III-229–232. 7. Gonz´alez C.M., Larrondo H.A., Gayoso C.A., Arnone L.J., (2003). Generaci´on de secuencias binarias pseudo aleatorias por medio de un mapa ca´otico 3d. in Proceedings del IX Workshop de IBERCHIP. 8. De Micco L., Zabaleta O.G., Gonzlez C.M., Arizmendi C.M., Larrondo H.A., (2010). Estocasticidad de un atractor catico determinista implementado en fpga. Proceedings Iberchip. 9. De Micco L., Larrondo H.A., (2011). FPGA implementation of a chaotic oscillator using RK4 method. 2011 VII Southern Conference on Programmable Logic (SPL), Cordoba, 185-190.doi: 10.1109/SPL.2011.5782646. 10. Merah L., Ali-Pacha A., Said N.H., Mamat M., (2013). Design and FPGA implementation of Lorenz chaotic system for information security issues. Applied Mathematical Sciences, 7(5), 237-246. 11. Chua L.O., Yang L., (1988). Cellular neural networks: Theory. IEEE Trans. Circuits Syst., 35, 1257-1272. 12. Chua L.O., Yang L., (1988). Cellular neural networks: applications. IEEE Transactions on Circuits and Systems, 35(10), 1273-1290. 13. Zou F., Nossek J.A., (1993). Bifurcation and chaos in cellular neural networks. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 40(3), 166-173. 14. Zou F., Nossek J.A., (1991). A chaotic attractor with cellular neural networks. in IEEE Transactions on Circuits and Systems, 38(7), 811-812. 15. Gerosa A., Bernardini R., Pietri S., (2001). A fully integrated 8-bit, 20MHz, truly random numbers generator, based on a chaotic system. In: Proceedings of the Southwest Symposium on Mixed-Signal Design, SSMSD, 87–92. 16. Karakaya B., Yeniceri R., Yalcin M.E., (2015). Wave computer core using fixed-point arithmetic. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 1514-1517.
Yıl 2018, Cilt: 13 Sayı: 1, 25 - 29, 01.03.2018

Öz

Kaynakça

  • 1. Strogatz S.H., Herbert D.E., (1996). Nonlinear dynamics and chaos. Medical Physics-New York-Institute of Physics, 23(6), 993-995. 2. Natsheh A.N., Al-Habibah E.M.S., (2015). Chaos control DC-DC boost converter by FPGA. 2015 IEEE 42nd Photovoltaic Specialist Conference (PVSC), New Orleans, LA, 1-6. 3. Hidalgo R.M., Fernndez J.G., Rivera R.R., Larrondo H.A., (2001). Versatile dsp-based chaotic communication system. Electronic Letters, 37, 1204–1205. 4. Ali-Pacha A., Said N.H., M’Hamed A., Belgoraf A., (2007). Lorenz’s attractor applied to the stream cipher (alipacha generator). Chaos, Solitons and Fractals, 33(5), 1762-1766. 5. Mazzini G., Setti G., Rovatti R., (1997). Chaotic complex spreading sequences for aynhchronous ds-cdma-part 1: System modeling and results. IEEE Trans. Circuits Sys. 1, 44(10), 937–947. 6. Setti G., Balestra M., Rovatti R., (2000). Experimental verification of enhanced electromagnetic compatibility in chaotic fm clock signals. in Proceedings of ISCAS’00. IEEE Circuits and Systems Society, III-229–232. 7. Gonz´alez C.M., Larrondo H.A., Gayoso C.A., Arnone L.J., (2003). Generaci´on de secuencias binarias pseudo aleatorias por medio de un mapa ca´otico 3d. in Proceedings del IX Workshop de IBERCHIP. 8. De Micco L., Zabaleta O.G., Gonzlez C.M., Arizmendi C.M., Larrondo H.A., (2010). Estocasticidad de un atractor catico determinista implementado en fpga. Proceedings Iberchip. 9. De Micco L., Larrondo H.A., (2011). FPGA implementation of a chaotic oscillator using RK4 method. 2011 VII Southern Conference on Programmable Logic (SPL), Cordoba, 185-190.doi: 10.1109/SPL.2011.5782646. 10. Merah L., Ali-Pacha A., Said N.H., Mamat M., (2013). Design and FPGA implementation of Lorenz chaotic system for information security issues. Applied Mathematical Sciences, 7(5), 237-246. 11. Chua L.O., Yang L., (1988). Cellular neural networks: Theory. IEEE Trans. Circuits Syst., 35, 1257-1272. 12. Chua L.O., Yang L., (1988). Cellular neural networks: applications. IEEE Transactions on Circuits and Systems, 35(10), 1273-1290. 13. Zou F., Nossek J.A., (1993). Bifurcation and chaos in cellular neural networks. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 40(3), 166-173. 14. Zou F., Nossek J.A., (1991). A chaotic attractor with cellular neural networks. in IEEE Transactions on Circuits and Systems, 38(7), 811-812. 15. Gerosa A., Bernardini R., Pietri S., (2001). A fully integrated 8-bit, 20MHz, truly random numbers generator, based on a chaotic system. In: Proceedings of the Southwest Symposium on Mixed-Signal Design, SSMSD, 87–92. 16. Karakaya B., Yeniceri R., Yalcin M.E., (2015). Wave computer core using fixed-point arithmetic. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 1514-1517.
Toplam 1 adet kaynakça vardır.

Ayrıntılar

Birincil Dil İngilizce
Konular Mühendislik
Bölüm TJST
Yazarlar

Bariş Karakaya

Vedat Çelik Bu kişi benim

Arif Gülten Bu kişi benim

Yayımlanma Tarihi 1 Mart 2018
Gönderilme Tarihi 5 Ocak 2017
Yayımlandığı Sayı Yıl 2018 Cilt: 13 Sayı: 1

Kaynak Göster

APA Karakaya, B., Çelik, V., & Gülten, A. (2018). Implementation of Two Cell Non-Autonomous CNN Model on FPGA. Turkish Journal of Science and Technology, 13(1), 25-29.
AMA Karakaya B, Çelik V, Gülten A. Implementation of Two Cell Non-Autonomous CNN Model on FPGA. TJST. Mart 2018;13(1):25-29.
Chicago Karakaya, Bariş, Vedat Çelik, ve Arif Gülten. “Implementation of Two Cell Non-Autonomous CNN Model on FPGA”. Turkish Journal of Science and Technology 13, sy. 1 (Mart 2018): 25-29.
EndNote Karakaya B, Çelik V, Gülten A (01 Mart 2018) Implementation of Two Cell Non-Autonomous CNN Model on FPGA. Turkish Journal of Science and Technology 13 1 25–29.
IEEE B. Karakaya, V. Çelik, ve A. Gülten, “Implementation of Two Cell Non-Autonomous CNN Model on FPGA”, TJST, c. 13, sy. 1, ss. 25–29, 2018.
ISNAD Karakaya, Bariş vd. “Implementation of Two Cell Non-Autonomous CNN Model on FPGA”. Turkish Journal of Science and Technology 13/1 (Mart 2018), 25-29.
JAMA Karakaya B, Çelik V, Gülten A. Implementation of Two Cell Non-Autonomous CNN Model on FPGA. TJST. 2018;13:25–29.
MLA Karakaya, Bariş vd. “Implementation of Two Cell Non-Autonomous CNN Model on FPGA”. Turkish Journal of Science and Technology, c. 13, sy. 1, 2018, ss. 25-29.
Vancouver Karakaya B, Çelik V, Gülten A. Implementation of Two Cell Non-Autonomous CNN Model on FPGA. TJST. 2018;13(1):25-9.