Analysis and Compensation of Dead Time Harmonics Based on Time Compensation Strategy in the Single-Phase Full-Bridge Inverters

Abstract

A short period, called dead time, is implemented to prevent power switching devices from shoot-through in voltage-source inverters (VSI). While adding dead time is required in the switching signals, it also causes negative effects on inverter operation such as distortion at output voltage due to significant number of harmonic components, and reduction in voltage magnitude of fundamental components. Eventually, the negative effects caused by dead time have to be compensated with compensation schemes. Different modulation schemes, which are called unipolar and bipolar switching, can be implemented in VSI, which in return might change the dead time effect. Although analysis of bipolar switching on the dead time effect has been implemented, analysis of unipolar switching is not addressed by most. In this paper, the effect of dead time on unipolar sinusoidal pulse width modulation (SPWM) is analyzed, the principle of the proposed compensation strategy is described in detail and the time compensation method with unipolar SPWM scheme is implemented using microprocessor-STM32F407G. The technique is intensively simulated and the evaluated through experimental results on resistive and resistive-inductive loads by comparing uncompensated and compensated states. Simulation and experimental results are presented to demonstrate and confirm the validity of the proposed dead-time compensation method.

Keywords

• Dead time compensation method
• Dead time effect
• Single phase full bridge inverter
• Time compensation method
• Unipolar switching

References

1. [1] C¸ amur S., Arifo˘glu B., Bes¸er E. Kandemir and Bes¸er E. “Design and Application of a Novel Structure and Topology for Single-Phase Five Level Inverter”, Wseas Transactions on Electronics, 2006.
2. [2] Zhang, J. and Luo, F. L. ”An accurate approach of dead-time compensation for three-phase DC/AC inverter.” 2009 4th IEEE Conference Industrial Electronic, doi: 10.1109/ICIEA.2009.5138745.
3. [3] Ji, Y.; Yang, Y.; Zhou, J.; Ding, H.; Guo, X.; Padmanaban, S. Control Strategies of Mitigating Dead-time Effect on Power Converters: An Overview. Electronics 2019, 8, 196. doi:10.3390/electronics8020196.
4. [4] Choi, J., and Sul, S. ”A new compensation strategy reducing voltage/ current distortion in PWM VSI systems operating with low output voltages. IEEE Transactions on Industry Applications, 31, 1001- 1008,1995.
5. [5] Cao, F., Liu, J., and Zhang, Y. ”A switching strategy of dead-time elimination for pulse width modulation converters. 2015 IEEE 2nd International Future Energy Electronics Conference (IFEEC), 1-14.
6. [6] Zammit, D., Apap, M., and Staines, C.S. “Dead time compensation in h-bridge inverters,” International Journal of Industrial Electronics and Drives, vol. 4, DOI 10.1504/IJIED.2018.090411, no. 1, pp. 56–68, 3 2018.
7. [7] Jeong, S., and Park, M. ”The analysis and compensation of dead-time effects in PWM inverters,” in IEEE Transactions on Industrial Electronics, vol. 38, no. 2, pp. 108-114, April 1991, doi: 10.1109/41.88903.
8. [8] Narmatha, R., and Govindaraj, T. “Inverter Dead-Time Elimination for Reducing Harmonic Distortion and Improving Power Quality”, International journal of Asian Scientific Research, vol.3, April 2013.

9. [9] Ikegami, S., Hoshi, N., and Haruna, J., ”Experimental verification of dead-time compensation scheme for pulse width modulation scheme on six-switch two three-phase output inverter,” 2014 17th International Conference on Electrical Machines and Systems (ICEMS), 2014, pp. 1420-1424, doi: 10.1109/ICEMS.2014.7013709.
10. [10] Weerakoon, D., Sandaruwan, B., De Silva, R., Abeyratne, S. and Rathnayake, D. ”A novel dead-time compensation scheme for PWM VSI drives,” 2016 IEEE International Conference on Information and Automation, 2016, doi: 10.1109/ICIAFS.2016.7946570.
11. [11] Hwang, S. and Kim, J. ”Dead Time Compensation Method for Voltage- Fed PWM Inverter,” in IEEE Transactions on Energy Conversion, vol. 25, no. 1, pp. 1-10, March 2010, doi: 10.1109/TEC.2009.2031811.
12. [12] Aizawa, N., Kikuchi, M., Kubota, H. Miki, I. and Matsuse, K. ”Deadtime effect and its compensation in common-mode voltage elimination of PWM inverter with auxiliary inverter,” The 2010 International Power Electronics Conference, doi: 10.1109/IPEC.2010.5543867.
13. [13] Liu, Y.; Huang, Q.; Dong, C. The direct pulse compensation of deadtime of APF. Procedia Eng. 2011, 15, 5355–5362.
14. [14] P. J. P. Vinod and P. P. N. Tekwani. “Pulse-based dead-time compensation method for self- balancing space vector pulse width-modulated scheme used in a three-level inverter-fed induction motor drive,” IET Power Electron., vol. 4, no. January 2010, pp. 624–631, 2011.
15. [15] B. Welchko, S. Schulz, and S. Hiti, “Effects and compensation of deadtime and minimum pulse-width limitations in two-level PWM voltage source inverters,” in Proc. 2006 IEEE Ind. Appl. Conf., 8–12 Oct. 2006, vol. 2, pp. 889–896.
16. [16] T. Abhiram, P. S. Reddy and P. V. N. Prasad, ”Integrated dead-time SVPWM algorithm for indirect vector controlled two-level inverter fed induction motor drive,” 2017 International Conference on Information, Communication, Instrumentation and Control (ICICIC), 2017, pp. 1-6, doi: 10.1109/ICOMICON.2017.8279073.
17. [17] J. S. Yu, G. Jin, S. L. Cheng and W. T. Ng, ”Digital dead-time control for an integrated tri-mode buck-boost DC-DC converter,” 2015 9th International Conference on Power Electronics and ECCE Asia (ICPEECCE Asia), 2015, pp. 1768-1771, doi: 10.1109/ICPE.2015.7168017.
18. [18] S.-H. Hwang and J.-M. Kim, “Dead time compensation method for voltage-fed PWM inverter,” IEEE Trans. Energy Convers., vol. 25, no. 1, pp. 1–10, Mar. 2010.
19. [19] M.A. Herran, J.R. Fischer, S.A. Gonzalez, M.G. Judewicz, and D.O. Carrica, “Adaptive dead-time compensation for grid-connected PWM inverters of single-stage PV systems,” IEEE Trans. Power Electron., vol. 28, no. 6, pp. 2816–2825, Jun. 2013.
20. [20] K. Zhou, D. Wang, Y. Yang, and F. Blaabjerg, ”Periodic Control of Power Electronic Converters ”, ser. Energy Engineering. Institution of Engineering and Technology, 2016.
21. [21] Z. Tang and B. Akin, “Suppression of dead-time distortion through revised repetitive controller in PMSM drives,” IEEE Trans. Energy Convers., vol. 32, no. 3, pp. 918–930, Sept. 2017.
22. [22] Y. Yang, K. Zhou, H. Wang, and F. Blaabjerg, “Harmonics mitigation of dead time effects in PWM converters using a repetitive controller,” in Proc. of APEC, pp. 1479–1486, Mar. 2015.
23. [23] X. Chen, X. Ruan, D. Yang, W. Zhao, and L. Jia, “Injected grid current quality improvement for a voltage-controlled grid-connected inverter,” IEEE Trans. Power Electron., vol. 33, no. 2, pp. 1247–1258, Feb. 2018.
24. [24] Hengbing Zhao, Q. M. J. Wu and A. Kawamura, ”An accurate approach of nonlinearity compensation for VSI inverter output voltage,” in IEEE Transactions on Power Electronics, vol. 19, no. 4, pp. 1029-1035, July 2004, doi: 10.1109/TPEL.2004.830072.
25. [25] Li C., Gu Y., LiW., He X., Dong Z., Chen G., Ma C., Zhang L. ”Analysis and compensation of dead-time effect considering parasitic capacitance and ripple current”, 2015 IEEE Applied Power Electronics Conference and Exposition(APEC),2015,pp.1501-1506.
26. [26] N. Urasaki, T. Senjyu, T. Kinjo, K. Uezato, T. Funabashi and H. Sekine, ”Dead-time compensation strategy for permanent magnet synchronous motor drive taking zero current clamp and parasitic capacitor effects into account,” 30th Annual Conference of IEEE Industrial Electronics Society, 2004.IECON2004,2004,pp.2718-2723Vol.3.
27. [27] Z. Zhang and L. Xu, “Dead-time compensation of inverters considering snubber and parasitic capacitance,” IEEE Trans. Power Electron., vol. 29, no. 6, pp. 3179–3187, Jun. 2014.
28. [28] Namboodiri, A. “Unipolar and Bipolar PWM Inverter”, IJIRST –International Journal for Innovative Research in Science Technology vol. 1, December 2014, ISSN (online): 2349-6010.
29. [29] Endiz, M. and Akkaya, R. “Matlab / Simulink ile Bipolar ve Unipolar PWM Kontrol Tekniklerinin Kars¸ılas¸tırmalı Olarak ˙Incelenmesi Comparative Study of Bipolar and Unipolar PWM Control Tech-niques using Matlab / Simulink”, no 24, pp. 309–313, 2021, doi: 10.31590/ejosat.900868.
30. [30] Yuan, G., Luo, S., Zhou, S., Zou, X., and Zou, K. ”Low-order harmonics analysis and suppression method for 400Hz single-phase VSI,” 2015 IEEE Applied Power Electronics Conference and Exposition (APEC), 2015, pp. 2341-2345, doi: 10.1109/APEC.2015.7104675.
31. [31] STMicroelectronics,”RM0090 Reference manual”, STM32F407/417 datasheet, Oct.2012 [Revised Feb. 2021].