FPGA-Based Cosimulation of S-Box Constitution from Fractional Order Liu System

Abstract

Substitution box(S-box) has an important duty in encryption. In recent years plenty of S-box designs by chaotic systems have been studied. In this paper a high speed S-box constitution from fractional order Liu system on FPGA is proposed. The design was implemented by using Xilinx System Generator(XSG) toolbox in MATLAB/Simulink software in single precision floating point numbers format and a low cost Basys 3 FPGA trainer card was used. In addition, numerical fractional order equations was solved by using Grünwald-Letnikov(GL) method with 1024 elements length. The S-box table was constructed about 0.137s. After all performance analyzes as nonlinearity, strict avalanche criterion, differential probability, bits independent criterion, and equiprobable input/output XOR distribution, were performed. The performance analyzes shown that the design was satisfactory.

Keywords

• S-box
• fractional order systems
• Liu chaotic system
• FPGA

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