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CMOS Tabanlı VDCC ve Fark Kuvvetlendiricisi FGMOS Tabanlı VDCC Devrelerinin Performans Analizinin Karşılaştırılması ve Filtre Uygulaması

Year 2023, , 25 - 31, 31.07.2023
https://doi.org/10.55581/ejeas.1319156

Abstract

Bu makale, CMOS tabanlı VDCC (Voltage Differencing Current Conveyor) devreleri ile fark kuvvetlendiricisi FGMOS tabanlı VDCC devrelerinin karşılaştırmasını ve performans analizini sunar. VDCC devresinin giriş aşamasındaki fark kuvvetlendiricileri, CMOS yerine FGMOS kullanılarak tasarlanır. VDCC devresinin giriş katlarındaki fark kuvvetlendiricilerinin CMOS yerine FGMOS kullanılarak tasarlanması, devrenin giriş sinyalini yükselterek doğrusallık ve voltaj takip etme özelliklerinde önemli bir artış sağlar. Aynı zamanda FGMOS transistörler kullanılarak devrenin aritmetik hesaplamaları sağlayan giriş aşaması basitleştirilir. VDCC devre topolojisinin çok yönlülüğünü göstermek için üç girişli tek çıkışlı (TISO) tip bant geçiren filtre uygulaması verilir. CMOS tabanlı VDCC filtre devresinin THD değeri %15.99 olarak bulunur. Önerilen fark kuvvetlendiricisi FGMOS tabanlı VDCC filtre devresinin THD değeri %1.03 olarak bulunur. Teorik analiz sonuçları, simülasyon sonuçlarını doğrulamaktadır. Sunulan CMOS ve FGMOS tabanlı bant geçiren filtreler, 0.9 V'a eşit bir güç kaynağı voltajı olan VDD ile TSMC CMOS 0,18 μm teknolojisi kullanılarak simüle edilir. Önerilen devre

References

  • Villegas, E.R., Low power and low voltage circuit design with the FGMOS transistor, In: The Institution of Engineering and Technology, pp. 7-40, 2006.
  • Martin, M. N., Roth, D. R., Garrison-Darrin, A., McNulty, P. J., & Andreou, A. G. (2001). FGMOS dosimetry: Design and implementation. IEEE Transactions on Nuclear Science, 48(6), 2050-2055.
  • Yin, L., Embabi, S. H. K., & Sanchez-Sinencio, E. (1997). A floating-gate mosfet D/A converter. In 1997 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 409-412). IEEE.
  • Manhas, P. S., Sharma, S., Pal, K., Mangotra, L. K., & Jamwal, K. K. S. (2008). High performance FGMOS-based low voltage current mirror, 46, 355-358.
  • Razavi, B., Design of analog integrated circuits, In: McGraw Hill, Second Edition, pp.1-124, 2001.
  • Rajput, S. S., & Jamuar, S. S. (2000). A high performance current mirror for low voltage designs, IEEE APCCAS 2000. 2000 IEEE Asia-Pacific Conference on Circuits and Systems. Electronic Communication Systems.(Cat. No. 00EX394) (pp. 170-173). IEEE.
  • Sharma, S., Rajput, S. S., Magotra, L. K., & Jamuar, S. S. (2002). FGMOS based wide range low voltage current mirror and its applications. In Asia-pacific conference on circuits and systems, (pp. 331-334), IEEE.
  • Gupta, R., Sharma, S., & Jamuar, S. S. (2010). A low voltage current mirror based on quasi-floating gate MOSFETs. 2010 Institute of Electrical and Electronics Engineers Asia Pacific Conference on Circuits and Systems, (pp. 580-583), IEEE.
  • Anand, A., Mandal, S. K., Dash, A., & Patro, B. S. (2013). FGMOS based low-voltage low-power high output impedance regulated cascode current mirror. International Journal of VLSI Design & Communication Systems, 4(2), 39-41.
  • Gupta, S., Sandhu, M., Gupta, M., & Arora, T. S. (2019). A new electronically tunable CM/VM oscillator using all grounded components. Applications of Artificial Intelligence Techniques in Engineering: SIGMA 2018, 2, 141-151, Springer Singapore.
  • Horng, J. W. (2008). High input impedance voltage-mode universal biquadratic filter with three inputs using DDCCs. Circuits, Systems & Signal Processing, 27, 553-562.
  • Keskin, A. Ü. (2006). Multi-function biquad using single CDBA. Electrical Engineering, 88, 353-356.
  • Tangsrirat, W., Tanjaroen, W., & Pukkalanun, T. (2009). Current-mode multiphase sinusoidal oscillator using CDTA-based allpass sections. AEU-International Journal of Electronics and Communications, 63(7), 616-622.
  • Horng, J. W. (2002). Voltage-mode universal biquadratic filter with one input and five outputs using OTAs. International Journal of Electronics, 89(9), 729-737.
  • Lee, C. N. (2010). Multiple-mode OTA-C universal biquad filters. Circuits, Systems and Signal Processing, 29, 263-274.
  • Shah, N. A., Rather, M. F., & Iqbal, S. Z. (2003). Three input and one output voltage-mode universal filter, IJPAP 41(7), 556-558.
  • Chaturvedi, B., Mohan, J., Kumar, A., & Pal, K. (2020). Current-mode first-order universal filter and its voltage-mode transformation. Journal of Circuits, Systems and Computers, 29(09), 2050149,
  • Kaçar, F., & Yeşil, A. (2010). Voltage mode universal filters employing single FDCCII. Analog Integrated Circuits and Signal Processing, 63, 137-142.
  • Kaçar, F., Metin, B., Kuntman, H., & Cicekoglu, O. (2010). A new high-performance CMOS fully differential second-generation current conveyor with application example of biquad filter realisation. International Journal of Electronics, 97(5), 499-510,
  • Kaçar, F., & Yeşil, A. (2012). FDCCII‐based electronically tunable voltage‐mode biquad filter. International Journal of Circuit Theory and Applications, 40(4), 377-383.
  • Kacar, F., Yesil, A., & Noori, A. (2012). New CMOS realization of voltage differencing buffered amplifier and its biquad filter applications. Radioengineering, 21(1), 333-339.
  • Biolek, D., Senani, R., Biolkova, V., & Kolka, Z. (2008). Active elements for analog signal processing: classification, review, and new proposals. Radioengineering, 17(4), 15-32.
  • Kaçar, F., Yeşil, A., Minaei, S., & Kuntman, H. (2014). Positive/negative lossy/lossless grounded inductance simulators employing single VDCC and only two passive elements. AEU-International Journal of Electronics and Communications, 68(1), 73-78,
  • Kaçar, F., Yeşil, A., & Gürkan, K. (2015). Design and experiment of VDCC-based voltage mode universal filter. Indian Journal of Pure & Applied Physics, 53(5), 341-349.
  • Anand, A., Mandal, S. K., Dash, A., & Patro, B. S. (2013). FGMOS based low-voltage low-power high output impedance regulated cascode current mirror. International Journal of VLSI Design & Communication Systems, 4(2), 39-50,
  • Patidar, R. D., & Singh, S. P. (2009). Harmonics estimation and modeling of residential and commercial loads. 2009 International Conference on Power Systems (pp. 1-6). IEEE.
  • Sivaraman, P., & Sharmeela, C. Power system harmonics, In: Power Quality in Modern Power Systems, Academic Press, pp. 61-103, 2021.
  • Prabaharan, N., & Palanisamy, K. (2017). A comprehensive review on reduced switch multilevel inverter topologies, modulation techniques, and applications. Renewable and Sustainable Energy Reviews, 76, 1248-1282,
  • https://www.ieee.org/ (Access Date: 03.05.2023)
  • IEEE. (2022). Standard for Harmonic Control in Electric Power Systems, IEEE Std 519-2022 (Revision of IEEE Std 519-2014), 1-31.

Comparison of Performance Analysis of CMOS-based VDCC and Differantial Amplifiers FGMOS-based VDCC Circuits and Its Filter Application

Year 2023, , 25 - 31, 31.07.2023
https://doi.org/10.55581/ejeas.1319156

Abstract

This paper presents a comparison and performance analysis of CMOS-based VDCC (Voltage Differencing Current Conveyor) circuits and differential amplifier FGMOS-based circuits. Differential amplifiers at the input stage of the VDCC circuit are designed using FGMOS instead of CMOS. Designing the differential amplifiers in the input stages of the VDCC circuit using FGMOS instead of CMOS amplifies the input signal of the circuit, providing a significant increase in linearity and voltage following properties. At the same time by using FGMOS transistors, the input stage of the circuit, which provides arithmetic calculations, is simplified. A three-input single output (TISO) type band-pass filter application is given to show the versatility of the VDCC circuit topology. The THD value of the CMOS-based VDCC filter circuit is found to be 15.99%. The THD value of the proposed differential amplifiers FGMOS-based VDCC filter circuit is found to be 1.03%. Theoretical analysis results confirm the simulation results. The presented CMOS and FGMOS-based band-pass filters are simulated using TSMC CMOS 0.18 μm technology with VDD, a power supply voltage equal to 0.9 V. The proposed circuit topology will be an essential reference in the literature for researchers to design new linearly tunable filters.

References

  • Villegas, E.R., Low power and low voltage circuit design with the FGMOS transistor, In: The Institution of Engineering and Technology, pp. 7-40, 2006.
  • Martin, M. N., Roth, D. R., Garrison-Darrin, A., McNulty, P. J., & Andreou, A. G. (2001). FGMOS dosimetry: Design and implementation. IEEE Transactions on Nuclear Science, 48(6), 2050-2055.
  • Yin, L., Embabi, S. H. K., & Sanchez-Sinencio, E. (1997). A floating-gate mosfet D/A converter. In 1997 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 409-412). IEEE.
  • Manhas, P. S., Sharma, S., Pal, K., Mangotra, L. K., & Jamwal, K. K. S. (2008). High performance FGMOS-based low voltage current mirror, 46, 355-358.
  • Razavi, B., Design of analog integrated circuits, In: McGraw Hill, Second Edition, pp.1-124, 2001.
  • Rajput, S. S., & Jamuar, S. S. (2000). A high performance current mirror for low voltage designs, IEEE APCCAS 2000. 2000 IEEE Asia-Pacific Conference on Circuits and Systems. Electronic Communication Systems.(Cat. No. 00EX394) (pp. 170-173). IEEE.
  • Sharma, S., Rajput, S. S., Magotra, L. K., & Jamuar, S. S. (2002). FGMOS based wide range low voltage current mirror and its applications. In Asia-pacific conference on circuits and systems, (pp. 331-334), IEEE.
  • Gupta, R., Sharma, S., & Jamuar, S. S. (2010). A low voltage current mirror based on quasi-floating gate MOSFETs. 2010 Institute of Electrical and Electronics Engineers Asia Pacific Conference on Circuits and Systems, (pp. 580-583), IEEE.
  • Anand, A., Mandal, S. K., Dash, A., & Patro, B. S. (2013). FGMOS based low-voltage low-power high output impedance regulated cascode current mirror. International Journal of VLSI Design & Communication Systems, 4(2), 39-41.
  • Gupta, S., Sandhu, M., Gupta, M., & Arora, T. S. (2019). A new electronically tunable CM/VM oscillator using all grounded components. Applications of Artificial Intelligence Techniques in Engineering: SIGMA 2018, 2, 141-151, Springer Singapore.
  • Horng, J. W. (2008). High input impedance voltage-mode universal biquadratic filter with three inputs using DDCCs. Circuits, Systems & Signal Processing, 27, 553-562.
  • Keskin, A. Ü. (2006). Multi-function biquad using single CDBA. Electrical Engineering, 88, 353-356.
  • Tangsrirat, W., Tanjaroen, W., & Pukkalanun, T. (2009). Current-mode multiphase sinusoidal oscillator using CDTA-based allpass sections. AEU-International Journal of Electronics and Communications, 63(7), 616-622.
  • Horng, J. W. (2002). Voltage-mode universal biquadratic filter with one input and five outputs using OTAs. International Journal of Electronics, 89(9), 729-737.
  • Lee, C. N. (2010). Multiple-mode OTA-C universal biquad filters. Circuits, Systems and Signal Processing, 29, 263-274.
  • Shah, N. A., Rather, M. F., & Iqbal, S. Z. (2003). Three input and one output voltage-mode universal filter, IJPAP 41(7), 556-558.
  • Chaturvedi, B., Mohan, J., Kumar, A., & Pal, K. (2020). Current-mode first-order universal filter and its voltage-mode transformation. Journal of Circuits, Systems and Computers, 29(09), 2050149,
  • Kaçar, F., & Yeşil, A. (2010). Voltage mode universal filters employing single FDCCII. Analog Integrated Circuits and Signal Processing, 63, 137-142.
  • Kaçar, F., Metin, B., Kuntman, H., & Cicekoglu, O. (2010). A new high-performance CMOS fully differential second-generation current conveyor with application example of biquad filter realisation. International Journal of Electronics, 97(5), 499-510,
  • Kaçar, F., & Yeşil, A. (2012). FDCCII‐based electronically tunable voltage‐mode biquad filter. International Journal of Circuit Theory and Applications, 40(4), 377-383.
  • Kacar, F., Yesil, A., & Noori, A. (2012). New CMOS realization of voltage differencing buffered amplifier and its biquad filter applications. Radioengineering, 21(1), 333-339.
  • Biolek, D., Senani, R., Biolkova, V., & Kolka, Z. (2008). Active elements for analog signal processing: classification, review, and new proposals. Radioengineering, 17(4), 15-32.
  • Kaçar, F., Yeşil, A., Minaei, S., & Kuntman, H. (2014). Positive/negative lossy/lossless grounded inductance simulators employing single VDCC and only two passive elements. AEU-International Journal of Electronics and Communications, 68(1), 73-78,
  • Kaçar, F., Yeşil, A., & Gürkan, K. (2015). Design and experiment of VDCC-based voltage mode universal filter. Indian Journal of Pure & Applied Physics, 53(5), 341-349.
  • Anand, A., Mandal, S. K., Dash, A., & Patro, B. S. (2013). FGMOS based low-voltage low-power high output impedance regulated cascode current mirror. International Journal of VLSI Design & Communication Systems, 4(2), 39-50,
  • Patidar, R. D., & Singh, S. P. (2009). Harmonics estimation and modeling of residential and commercial loads. 2009 International Conference on Power Systems (pp. 1-6). IEEE.
  • Sivaraman, P., & Sharmeela, C. Power system harmonics, In: Power Quality in Modern Power Systems, Academic Press, pp. 61-103, 2021.
  • Prabaharan, N., & Palanisamy, K. (2017). A comprehensive review on reduced switch multilevel inverter topologies, modulation techniques, and applications. Renewable and Sustainable Energy Reviews, 76, 1248-1282,
  • https://www.ieee.org/ (Access Date: 03.05.2023)
  • IEEE. (2022). Standard for Harmonic Control in Electric Power Systems, IEEE Std 519-2022 (Revision of IEEE Std 519-2014), 1-31.
There are 30 citations in total.

Details

Primary Language English
Subjects Electronics
Journal Section Research Articles
Authors

Büşra Hasılcı 0000-0003-2322-5045

Fırat Kaçar 0000-0002-0967-914X

Publication Date July 31, 2023
Submission Date June 23, 2023
Published in Issue Year 2023