Conference Paper

A New Nano-Design of an Efficient Synchronous Full-Adder/Subtractor Based on Quantum-Dots

Volume: 22 September 1, 2023
  • Seyed-sajad Ahmadpour
  • Nima Jafari Navımıpour
  • Feza Kerestecıoglu
EN

A New Nano-Design of an Efficient Synchronous Full-Adder/Subtractor Based on Quantum-Dots

Abstract

Quantum-dot cellular automata (QCA), known as one of the alternative technologies of CMOS technology, promises to design digital circuits with extra low-power, extremely dense, and high-speed structures. Moreover, the next generation of digital systems will be used QCA as desired technology. In designing arithmetic circuits, efficient designs such as full-adder and full-subtractor can play a significant role. In addition, they are considering the most used structures in digital operations. Furthermore, full-adder and full-subtractor are always effective parts of all complex and well-known circuits such as Arithmetic Logic Unit (ALU), Microprocessors, etc. This paper proposes low complexity and high-speed QCA coplanar synchronous full-adder/subtractor structures by applying formulations based on the Exclusive-OR gate to decrease energy consumption. The proposed design is simulated using QCADesigner 2.0.3. The simulation results confirm the efficiency of the proposed circuit. Moreover, comparative investigation indicates the superiority of proposed designs compared to state-of-the-art designs. Finally, the suggested QCA coplanar synchronous full-adder/subtractor shows 5.88% and 7.69% improvement in consumed cells relative to the best full adder and full subtractor, respectively.

Keywords

References

  1. Abedi, D., Jaberipur, G., & Sangsefidi, M. (2015). Coplanar full adder in quantum-dot cellular automata via clock-zone-based crossover. IEEE Transactions on Nanotechnology, 14(3), 497-504.
  2. Ahmadpour, S.-S., Mosleh, M., & Heikalabad, S. R. (2018). A revolution in nanostructure designs by proposing a novel QCA full-adder based on optimized 3-input XOR. Physica B: Condensed Matter, 550, 383-392.
  3. Ahmadpour, S.-S., Mosleh, M., & Heikalabad, S. R. (2020). An efficient fault-tolerant arithmetic logic unit using a novel fault-tolerant 5-input majority gate in quantum-dot cellular automata. Computers & Electrical Engineering, 82, 106548.
  4. Angizi, S., Alkaldy, E., Bagherzadeh, N., & Navi, K. (2014). Novel robust single layer wire crossing approach for exclusive or sum of products logic design with quantum-dot cellular automata. Journal of Low Power Electronics, 10(2), 259-271.
  5. Bahar, A. N., & Wahid, K. A. (2019). Design of QCA-serial parallel multiplier (QSPM) with energy dissipation analysis. IEEE Transactions on Circuits and Systems II: Express Briefs.
  6. Bahar, A. N., & Wahid, K. A. (2020). Design of an efficient N× N butterfly switching network in Quantum-dot Cellular Automata (QCA). IEEE Transactions on Nanotechnology, 19, 147-155.
  7. Balali, M., Rezai, A., Balali, H., Rabiei, F., & Emadi, S. (2017). Towards coplanar quantum-dot cellular automata adders based on efficient three-input XOR gate. Results in Physics, 7, 1389-1395.

Details

Primary Language

English

Subjects

Computer Software

Journal Section

Conference Paper

Authors

Seyed-sajad Ahmadpour This is me
Türkiye

Nima Jafari Navımıpour This is me
Türkiye

Feza Kerestecıoglu This is me
Türkiye

Early Pub Date

August 4, 2023

Publication Date

September 1, 2023

Submission Date

June 22, 2023

Acceptance Date

July 24, 2023

Published in Issue

Year 2023 Volume: 22

APA
Ahmadpour, S.- sajad, Navımıpour, N. J., & Kerestecıoglu, F. (2023). A New Nano-Design of an Efficient Synchronous Full-Adder/Subtractor Based on Quantum-Dots. The Eurasia Proceedings of Science Technology Engineering and Mathematics, 22, 81-86. https://doi.org/10.55549/epstem.1337631