SIMPLE REALIZATION OF MULTI-BIT RIPPLE CARRY ADDERS IN QCA TECHNOLOGY

Abstract

An addition in digital signal processing is an important constructional unit for making all arithmetic operations. A full adder is a simple circuit that adds binary numbers. Ripple carry adder (RCA) is a cascade of the full adders that is used to add 8, 16, 32, etc. bit numbers. In this paper, multi-bit RCA is designed based on promising nanotechnology Quantum-dot Cellular Automata (QCA). In fact, QCA is getting investigated as an alternative to currently silicon-transistor based technology. The proposed RCA adder is designed as multilayer structure and is found as low complexity design in comparison with other RCA designs. 

Keywords

• Quantum-dot cellular automata,ripple carry adder,multilayer cross-over

References

1. C.S. Lent, P.D. Tougaw, W. Porod & G.H. Bernstein. (1993): Quantum Cellular Automata, Nanotechnology, 4, 49-57. M.B. Tahoori, J. Huang, M. Momenzadeh & F. Lombardi. (2004): Testing of Quantum Cellular Automata, 3, 432-442. J. C. Jeon, K. W. Kim & K. Y. Yoo. (2005): Non-group Cellular Automata Based One Time Password Authentication Scheme in Wireless Networks, Conference pros.: Secure Mobile Ad-hoc Networks and Sensor G. A. DiLabio, R. A. Wolkow, J. L. Pitters & G. P. Piva (2014): Atomic Quantum Dots, U.S. Patent Application 14/448,899. J. C. Jeon. (2015): Extendable Quantum-dot Cellular Automata Decoding Architecture Using 5-input Majority Gate, International Journal of Control and Automation, 8, 107-118. J. C. Jeon & K.Y. Yoo. (2008): Elliptic curve based hardware architecture using cellular automata, Mathematics and Computers in Simulation, 79, 1197-1203 H. Cho & E.E. Swartzlander. (2009): Adder and Multiplier design in Quantum-dot Cellular Automata, IEEE Trans. Computer, 58, 721-727. J. C. Jeon & K. Y. Yoo. (2008): Montgomery exponent architecture based on programmable cellular automata, Mathematics and Computers in Simulation, 79, 1189-1196. R. Zhang, K. Walus, W. Wang & G.A. Jullien. (2004): A Method of Majority Logic Reduction for Quantum Cellular Automata, IEEE Trans. Nanotechnology, 3, 443-450. J. C. Jeon & K. Y. Yoo (2005): Low-power exponent architecture in finite fields, IEE Proceedings-Circuits, Devices and System. 152, 573-578. S. Perri, P. Corsonello & G. Cocorullo (2014): Area-delay Efficient binary adders in QCA, IEEE Trans, 22, 1174-1179. D. Abedi & G. Jaberipur. (2015): 18th CSI International Symposium on Computer Architecture and Digital Systems, Tehran, Iran, Coplanar QCA serial adder and multiplier via clock-zone based crossovers. J. C. Jeon (2016): Low Hardware Complexity QCA Decoding Architecture Using Inverter Chain, International Journal of Control and Automation, 9, 347-358. K. Makanda & J.C. Jeon. (2014): Combinational Circuit Design Based on Quantum-dot Cellular Automata, International Journal of Control and Automation, 7, 369-378. J. S. Lee & J. C. Jeon (2016): Design of Low Hardware Complexity Multiplexer Using NAND Gates on Quantum-dot Cellular Automata, International Journal of Multimedia and Ubiquitous Engineering, 11, 307-318. F. Ahmad, G.M. Bhat, H. Khademolhosseini, S. Azimi, S. Angizi & K. Navi (2016): Toward single layer Quantum-dot Cellular Automata adders based on explicit interaction of cells, Journal of Computational Science, 16, 8-15. N. Safoev & J. C. Jeon (2017): Proceedings from Trends in Engineering and Technology, Manila, Philippines, Full Adder Based on Quantum-dot Cellular Automata. K. Walus, T.J. Dysart, G.A. Jullien & R.A. Budiman (2004): QCADesigner: a rapid design and simulation tool for quantum-dot cellular automata, IEEE Trans. Nanotechnology. 3, 26–31.