EN
FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION
Abstract
Harmonic Elimination and THD Minimisation in asymmetric cascaded multilevel inverter involves complex nonlinear non convex trigonometric transcendental equations which has several solutions.Among the various topologies of cascaded multilevel inverter asymmetric cascaded multilevel inverter has the advantage of reduced switch count when compared to traditional symmetric multilevel inverter topology. In this paper FPGA based hardware implementation is carried for a 13 level inverter by using offline computation of switching angle with weighted total harmonic distortion (WTHD) as the objective function. WTHD optimisation offers the blend of eliminating the specific lower order harmonics as in SHE-PWM and minimisation of THD as in OMTHD. The simulation and experimental results were presented for 7 level symmetric and 13 level asymmetric inverter. The experimental waveforms were analysed for THD and lower order harmonics using fluke power analyser and comparison of WTHD with SHE-PWM and OMTHD are presented .The results indicates that in a 13 level inverter the WTHD based optimisation yields reduced THD of 5.35% in simulation and 5.9% experimentally.It also eliminates all the specified 5th ,7th ,11th ,13th and 17th lower order harmonics.
Keywords
References
- L. M. Tolbert, F. Z. Peng, and T. G. Habetler, “Multilevel converter for large electric drives,” IEEE Trans. Ind. Appl., vol. 35, no. 1, pp. 36–44, Jan./Feb. 1999.
- Wang and F. Z. Peng, “Unified power flow controller using the cascade multilevel inverter,” IEEE Trans.Power Electron., vol. 19, no. 4, pp. 1077–1084, Jul. 2004.
- J. Rodrıguez, J. Lai, and F. Z. Peng, “Multilevel inverters: A survey of topologies, controls and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002.
- M. Manjrekar and G.Venkataramanan, “Advanced topologies and modulation strategies for multilevel converters,” in Proc. IEEE Power Electron Spec. Conf., Baveno, Italy, Jun. 1996, pp. 1013–1018.
- S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J.Rodriguez, M. Perez, J. I. Leon, “Recent Advances and Industrial Applications of Multilevel Converters, ” IEEE Transactions on Industrial Electronics, vol. 57, no.8, pp. 2553-2580, Aug. 2010.
- R.Marquardt, “Modular multilevel converter: An universal concept for HVDC-networks and extended dc-bus- applications,” in Proc. Int. Power Electron. Conf., 2010, pp. 502–507.
- B. Ozpineci, L. M. Tolbert, Zhong Du, “Multiple input converters for fuel cells,”in Proc. 39th IEEE Industry Applications Conference, vol. 2, pp. 791- 797, Oct.2004.
- Feel-Soon Kang, Sung-Jun Park, Su Eog Cho, Cheul-U Kim, T. Ise, “Multilevel PWM inverters suitable for the use of stand-alone photovoltaic power systems,” IEEE Transactions on Energy Conversion, vol. 20, no. 4, pp. 906- 915, Dec. 2005.
Details
Primary Language
English
Subjects
-
Journal Section
-
Publication Date
March 25, 2015
Submission Date
December 7, 2014
Acceptance Date
-
Published in Issue
Year 2014 Volume: 14 Number: 2
APA
Rangasamy, K., & Thottungal, R. (2015). FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION. IU-Journal of Electrical & Electronics Engineering, 14(2), 1799-1807. https://izlik.org/JA32NZ74KA
AMA
1.Rangasamy K, Thottungal R. FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION. IU-Journal of Electrical & Electronics Engineering. 2015;14(2):1799-1807. https://izlik.org/JA32NZ74KA
Chicago
Rangasamy, Kavitha, and Rani Thottungal. 2015. “FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION”. IU-Journal of Electrical & Electronics Engineering 14 (2): 1799-1807. https://izlik.org/JA32NZ74KA.
EndNote
Rangasamy K, Thottungal R (March 1, 2015) FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION. IU-Journal of Electrical & Electronics Engineering 14 2 1799–1807.
IEEE
[1]K. Rangasamy and R. Thottungal, “FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION”, IU-Journal of Electrical & Electronics Engineering, vol. 14, no. 2, pp. 1799–1807, Mar. 2015, [Online]. Available: https://izlik.org/JA32NZ74KA
ISNAD
Rangasamy, Kavitha - Thottungal, Rani. “FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION”. IU-Journal of Electrical & Electronics Engineering 14/2 (March 1, 2015): 1799-1807. https://izlik.org/JA32NZ74KA.
JAMA
1.Rangasamy K, Thottungal R. FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION. IU-Journal of Electrical & Electronics Engineering. 2015;14:1799–1807.
MLA
Rangasamy, Kavitha, and Rani Thottungal. “FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION”. IU-Journal of Electrical & Electronics Engineering, vol. 14, no. 2, Mar. 2015, pp. 1799-07, https://izlik.org/JA32NZ74KA.
Vancouver
1.Kavitha Rangasamy, Rani Thottungal. FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION. IU-Journal of Electrical & Electronics Engineering [Internet]. 2015 Mar. 1;14(2):1799-807. Available from: https://izlik.org/JA32NZ74KA