In this paper, an algorithm has been proposed to design lumped element delay equalizers which is considered as a single block as opposed to the existing methods in literature. Then after obtaining the desired delay performance, the designed delay equalizer is divided and realized as cascaded first-order and/or secondorder all-pass circuits. An example is given to illustrate the utilization of the proposed algorithm
| Primary Language | English |
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| Subjects | Engineering |
| Journal Section | Research Article |
| Authors | |
| Publication Date | April 29, 2015 |
| Published in Issue | Year 2015 Volume: 15 Issue: 1 |