FPGA BASED HARDWARE IMPLEMENTATION OF WTHD MINIMISATION IN ASYMMETRIC MULTILEVEL INVERTER USING BIOGEOGRAPHICAL BASED OPTIMISATION

Year 2014, Volume: 14 Issue: 2, 1799 - 1807, 25.03.2015

Kavitha Rangasamy , Rani Thottungal

Abstract

Harmonic Elimination and THD Minimisation in asymmetric cascaded multilevel inverter involves complex nonlinear non convex trigonometric transcendental equations which has several solutions.Among the various topologies of cascaded multilevel inverter asymmetric cascaded multilevel inverter has the advantage of reduced switch count when compared to traditional symmetric multilevel inverter topology. In this paper FPGA based hardware implementation is carried for a 13 level inverter by using offline computation of switching angle with weighted total harmonic distortion (WTHD) as the objective function. WTHD optimisation offers the blend of eliminating the specific lower order harmonics as in SHE-PWM and minimisation of THD as in OMTHD. The simulation and experimental results were presented for 7 level symmetric and 13 level asymmetric inverter. The experimental waveforms were analysed for THD and lower order harmonics using fluke power analyser and comparison of WTHD with SHE-PWM and OMTHD are presented .The results indicates that in a 13 level inverter the WTHD based optimisation yields reduced THD of 5.35% in simulation and 5.9% experimentally.It also eliminates all the specified 5th ,7th ,11th ,13th and 17th lower order harmonics.

Keywords

WTHD, BBO, SHE- PWM, OMTHD

References

• L. M. Tolbert, F. Z. Peng, and T. G. Habetler, “Multilevel converter for large electric drives,” IEEE Trans. Ind. Appl., vol. 35, no. 1, pp. 36–44, Jan./Feb. 1999.
• Wang and F. Z. Peng, “Unified power flow controller using the cascade multilevel inverter,” IEEE Trans.Power Electron., vol. 19, no. 4, pp. 1077–1084, Jul. 2004.
• J. Rodrıguez, J. Lai, and F. Z. Peng, “Multilevel inverters: A survey of topologies, controls and applications,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724–738, Aug. 2002.
• M. Manjrekar and G.Venkataramanan, “Advanced topologies and modulation strategies for multilevel converters,” in Proc. IEEE Power Electron Spec. Conf., Baveno, Italy, Jun. 1996, pp. 1013–1018.
• S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J.Rodriguez, M. Perez, J. I. Leon, “Recent Advances and Industrial Applications of Multilevel Converters, ” IEEE Transactions on Industrial Electronics, vol. 57, no.8, pp. 2553-2580, Aug. 2010.
• R.Marquardt, “Modular multilevel converter: An universal concept for HVDC-networks and extended dc-bus- applications,” in Proc. Int. Power Electron. Conf., 2010, pp. 502–507.
• B. Ozpineci, L. M. Tolbert, Zhong Du, “Multiple input converters for fuel cells,”in Proc. 39th IEEE Industry Applications Conference, vol. 2, pp. 791- 797, Oct.2004.
• Feel-Soon Kang, Sung-Jun Park, Su Eog Cho, Cheul-U Kim, T. Ise, “Multilevel PWM inverters suitable for the use of stand-alone photovoltaic power systems,” IEEE Transactions on Energy Conversion, vol. 20, no. 4, pp. 906- 915, Dec. 2005.
• L. Tolbert and T. G. Habetler, “Novel multilevel converter carrier-based PWM method,” IEEE Transactions on Industry Applications, vol. 35, pp. 1098–1107, Sept./Oct.
• L. Li, D. Czarkowski, Y. Liu, and P. Pillay, “Multilevel selective harmonic elimination PWM technique in series- connected voltage converters,”IEEE Trans. Ind. Appl., vol. 36, no. 1, pp. 160–170, Jan./Feb. 2000.
• F. S. Shyu and Y. S. Lai, “Virtual stage pulse-width modulation technique for multilevel inverter/converter,” IEEE Trans. Power Electron., vol. 17, no. 3, pp. 332–341, May 2002.
• M. S. A. Dahidah and V. G. Agelidis, “Selective harmonic elimination PWM control for ycascaded multilevel voltage source converters: A generalized formula,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1620–1630, Jul. 2008.
• Y. Liu, H. Hong, and A. Q. Huang, “Real-time calculation of switching angles minimizing THD for multilevel inverters with step modulation,” IEEE Trans. Ind. Electron., vol. 56, no. 2, pp. 285–293, Feb. 2009.
• L.G. Franquelo, J. Napoles, R.C.P. Guisado, J.I. Leon,M.A. harmonicmitigation technique to meet grid codes in three- level PWM converters,” in in IEEE Trans. Ind.Electr., Vol.54, No. 6, 2007, pp. 3022-3029. flexible selective
• J. Napoles, J.I. Leon, R. Portillo, L.G. Franquelo, M.A.Aguirre, “Selective harmonic mitigation technique for high-power converters,” in IEEE Trans. Ind. Electr., Vol. 57, No. 7, pp. 2315-2323, Jul.2010.
• V. G. Agelidis, A. Balouktsis, and M. S.A. Dahidah, “A five-level symmetrically defined selective harmonic elimination PWM strategy: Analysis and experimental validation,” in IEEE Trans. Power Electron., Vol. 23, No. 1, pp. 19–26, Jan. 2008.
• J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, andD. Zhong, “Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials and resultants,” IEEE Trans. Control Syst. Technol., vol. 13, no. 2, pp. 216–223, Mar. 2005.
• J. N. Chiasson, L. M. Tolbert, Z. Du,and K. J. McKenzie, “The use of power sums to solve the harmonic elimination equations for multilevel converters,” Eur. Power Electron. Drives J.,vol. 15, no. 1, pp. 19–27, Feb.2005.
• K. J. McKenzie, “Eliminating harmonics in a cascaded H- bridges multilevel inverter using resultant theory, symmetric polynomials, and power sums,” M.Sc. thesis, Univ. Tennessee, Chattanooga, 2004.
• B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, “Harmonic optimization of multilevel converters using genetic algorithms,” IEEE Power Electron. Lett., vol. 3, no. 3, pp. 92–95, Sep. 2005.
• R.Kavitha and Dr.Rani Thottungal, “Implementation of novel low cost Multilevel DC link inverter with harmonic profile improvement” , in Asian Power Electronics Journal, Vol. 2, No. 3, pp.158-162,Dec 2008
• H. Taghizadeh and M. Tarafdar Hagh, “Harmonic elimination of multilevel inverters using particle swarm optimization,” in Proc. IEEE-ISIE, Cambridge, U.K., 2008, pp. 393–397.
• M. G. H. Aghdam, S. H. Fathi, G. B. Gharehpetian, “Elimination of harmonics in a multi-level inverter with unequal DC sources using the homotopy algorithm,” IEEE International Symposium on Industrial Electronics, pp. 578-583, June 2007.
• M. T. Hagh, H. Taghizadeh, K. Razi, “Harmonic minimization in multilevel inverters using modified species-based Transactions on Power Electronics, vol. 24, no. 10, pp. 2259-2267, Oct. 2009.
• D. Simon“Biogeography-based optimization”IEEE Trans. Evol. Comput., vol. 12, no. 6, pp. 702-713, 2008.
• U. Singh , H. Kumar and T. S. Kamal "Design of Yagi- using Uda optimization", IEEE Trans. Antennas Propagat., vol. 58, no. 10, pp.3375 -3379 ,2010. based
• A. Bhattacharya and P. K. Chattopadhyay "Biogeography- based optimization for different economic load dispatch problems", IEEE Trans. Power Syst., vol. 25, no. 2, pp.1064 -1077 ,2010
• Bansal, A.K. Kumar, R. and Gupta, R.A.” Economic Analysis and Power Management of a Small Autonomous Hybrid Power System (SAHPS) Using Biogeography Based Optimization (BBO) Algorithm “IEEE Transactions On Smart Grid, Vol. 4, No. 1, pp.638 -648 ,2013
• R.Kavitha completed her B.E from
• Bharathiar University, India and M.E
• Degree from Anna University in 2001 and
• 2004 respectively. She has 11 years of
• teaching Experience and pursuing Ph.D. in
• Anna Univerity, Chennai. She is now working
• Professor in Kumaraguru college of
• Technology, India. She is a life member of
• ISTE. Her research interests are Multilevel
• inverters and Optimisation Techniques.
• Dr.Rani Thottungal obtained her B.E and
• M.E degree from Andhra University,India
• and her Ph.D degree from Bharathiar
• university,India. She has 23 years of
• teaching Experience. She is currently
• working as Professor in Kumaraguru
• college of Technology,India. She is a life
• member member of ISTE and IE. Her
• research interests includes power system and FACTS.