Analysis and floor plan of multimedia design for the internet of things

Abstract

A platform for computation and communication is planned to support real time multimedia communication system architecture (MCSA) model for Internet of Things (IoT) application. In the current scenario, reducing the chip area plays an important role in chip design, where lower power consumption becomes significant consideration. We applied a Dynamic Partial Reconfiguration (DPR) to design a processor peripheral model, achieving area reduction and power efficiency. Furthermore, the Audio Communication System Architecture (ACSA) filter design plays an important role in multimedia systems, demonstrating greater feasibility in hardware implementation. The objective of the paper is to design flexible system for different application areas with the use of partial reconfiguration technique. This allows for enhanced application performance. Utilizing the Design Rule Check (DRC), we achieve high level design on Xilinx platform. In this work, we compared Audio Mutimedia Architecture ACSA design with and without DPR with area and power. Our work has given better performance with respect to area reduction and low power consumption with respected to existing methods.

Keywords

• Audio Communication System Architecture
• Design Rule Check
• Dynamic Partial Reconfiguration
• Internet of Things
• Multimedia Communication System Architecture

References

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