Noise Analysis For Active Element Based Capacitor Multipliers

Abstract

In this study, comprehensive noise analyses and optimization of two different capacitance multiplier structures have been presented. Capacitor multipliers, essential in low frequency applications due to capacitors’ significant chip area requirement, play a significant role in high precision analog circuits. Noise impacts such filters by reducing the signal to noise ratio (SNR), increasing phase noise, and potentially causing distortion, which is critical in applications requiring high accuracy and stability, such as biomedical instrumentation, communication systems, and precision measurement devices. Therefore, thorough analysis and optimization of filter noise characteristics are essential for reliable operation in sensitive applications. Two capacitor multiplier structures are analyzed: the Multiple Output Voltage Differencing Transconductance Amplifier (MO-VDTA) based and the Multiple Output Current Differencing Transconductance Amplifier (MO-CDTA) based structures. The multiplication factor of the capacitor multiplier in basis of MO-VDTA varies between 120 and 750, depending on the IB value. This variation allows the cutoff frequency of the applied fi lter to change between 2 kH z and 12.4 kHz. The MO-CDTA based structure’s multiplication factor varies between 400 and 1250 by changing the VGS voltage of the external PMOS. This structure has been used in a 2nd order low pass filter, with the cutoff frequency varying between 23.6 kHz and 91 kHz in conjunction with multiplication factor changing. In this respect, comprehensive noise analyses of the filter applications of these two structures have been examined to ensure reliable and efficient operation in sensitive applications.

Keywords

• analog electronic
• microelectronic
• capacitor multiplier
• noise analysis
• multiplication factor
• MO-VDTA
• MO-CDTA

References

1. Kumar A, Singh D, Nand D. A Novel CFDITA-Based Design of Grounded Capacitance Multiplier and Its Transpose Structure. Circuits Syst Signal Process. Birkhauser; 2022;41(10):5319–39. DOI: 10.1007/S00034-022-02032-4/METRICS
2. Tang Y, Ismail M, Bibyk S. Adaptive miller capacitor multiplier for compact on-chip PLL filter. Electron Lett. 2003;39(1):43–5. DOI: 10.1049/EL:20030086
3. Sotner R, Jerabek J, Polak L, Petrzela J. Capacitance Multiplier Using Small Values of Multiplication Factors for Adjustability Extension and Parasitic Resistance Cancellation Technique. IEEE Access. Institute of Electrical and Electronics Engineers Inc.; 2020;8:144382–92. DOI: 10.1109/ACCESS.2020.3014388
4. Shukla P, Gupta A. Current-Mode PMOS capacitance multiplier. Proceedings of the International Conference on Inventive Systems and Control, ICISC 2017. Institute of Electrical and Electronics Engineers Inc.; 2017; DOI: 10.1109/ICISC.2017.8068658
5. Padilla-Cantoya I. Low-power high parallel load resistance current-mode grounded and floating capacitor multiplier. IEEE Transactions on Circuits and Systems II: Express Briefs. Institute of Electrical and Electronics Engineers Inc.; 2013;60(1):16–20. DOI: 10.1109/TCSII.2012.2234923
6. Stornelli V, Safari L, Barile G, Ferri G. A New Extremely Low Power Temperature Insensitive Electronically Tunable VCII-Based Grounded Capacitance Multiplier. IEEE Transactions on Circuits and Systems II: Express Briefs. Institute of Electrical and Electronics Engineers Inc.; 2021;68(1):72–6. DOI: 10.1109/TCSII.2020.3005524
7. Padilla-Cantoya I. Capacitor multiplier with wide dynamic range and large multiplication factor for filter applications. IEEE Transactions on Circuits and Systems II: Express Briefs. Institute of Electrical and Electronics Engineers Inc.; 2013;60(3):152–6. DOI: 10.1109/TCSII.2013.2240814
8. Al-Absi MA, Abulema’atti MT. A Tunable Floating Impedance Multiplier. Arab J Sci Eng. Springer Verlag; 2019;44(8):7085–9. DOI: 10.1007/S13369-019-03792-Z/METRICS

9. Yesil A, Yuce E, Minaei S. Grounded capacitance multipliers based on active elements. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2017;79:243– DOI: 10.1016/J.AEUE.2017.06.006
10. Yucehan T, Yuce E. A New Grounded Capacitance Multiplier Using a Single ICFOA and a Grounded Capacitor. IEEE Transactions on Circuits and Systems II: Express Briefs. Institute of Electrical and Electronics Engineers Inc.; 2022;69(3):729–33. DOI: 10.1109/TCSII.2021.3102118
11. Ozenli D, Alaybeyoglu E. An electronically tunable CMOS implementation of capacitance multiplier employing CCCDTA. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2022;155:154359. DOI: 10.1016/J. AEUE.2022.154359
12. Sakacı B, Özenli D. A current mode capacitance multiplier employing a single active element based on Arbel-Goldminz cells for low frequency applications. Microelectron Eng. Elsevier; 2024;288:112157. DOI: 10.1016/J.MEE.2024.112157
13. Özer E. Electronically tunable CFTA based positive and negative grounded capacitance multipliers. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2021;134:153685. DOI: 10.1016/J.AEUE.2021.153685
14. Ozenli D, Alaybeyoglu E, Kuntman H. A tunable lossy grounded capacitance multiplier circuit based on VDTA for the low frequency operations. Analog Integr Circuits Signal Process. Springer; 2022;113(2):163–70. DOI: 10.1007/S10470-022-02077-0/METRICS
15. Dogan M, Yuce E. A new CFOA based grounded capacitance multiplier. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2020;115:153034. DOI: 10.1016/J.AEUE.2019.153034
16. Ferri G, Safari L, Barile G, Scarsella M, Stornelli V. New Resistor-Less Electronically Controllable ±C Simulator Employing VCII, DVCC, and a Grounded Capacitor. Electronics 2022, Vol 11, Page Multidisciplinary Digital Publishing Institute; 2022;11(2):286. DOI: 10.3390/ELECTRONICS11020286
17. Padilla-Cantoya I, Gurrola-Navarro MA, Bonilla-Barragan CA, Molinar-Solis JE, RizoDominguez L, Medina-Vazquez AS. Impedance-mode capacitance multiplier with OTAbased flipped voltage follower for high accuracy and large multiplication factor. IEICE Electronics Express. The Institute of Electronics, Information and Communication Engineers; 2022;19(19):20220208–20220208. DOI: 10.1587/ELEX.19.20220208
18. Paul T, Roy S, Pal R. Lossy & Lossless Capacitance Multipliers: A Series of Realization Using VDTAs & Single Grounded Capacitor. Mapana Journal of Sciences. 2022;21:1-34. doi:10.12723/mjs.62.0.
19. Seneviratne S, Hu Y, Nguyen T, Lan G, Khalifa S, Thilakarathna K, et al. A Survey of Wearable Devices and Challenges. IEEE Communications Surveys and Tutorials. Institute of Electrical and Electronics Engineers Inc.; 2017;19(4):2573–620. DOI: 10.1109/COMST.2017.2731979
20. Rajan VS, Kishore KH, Sanjay R, Kumaravel S, Venkataramani A novel programmable attenuator based low Gm-OTAfor biomedical applications. Microelectronics J. Elsevier; 2020;97:104721. DOI: 10.1016/J.MEJO.2020.104721
21. Haghi M, Thurow K, Stoll R. Wearable Devices in Medical Internet of Things: Scientific Research and Commercially Available Devices. Healthc Inform Res. Korean Society of Medical Informatics; 2017;23(1):4–15. DOI: 10.4258/HIR.2017.23.1.4
22. Cardoso J. The Biomedical Engineering Handbook Third Edition Biomedical Engineering Fundamentals.
23. Huang D, Men K, Li D, Wen T, Gong Z, Sunden B, et al. Application of ultrasound technology in the drying of food products. Ultrason Sonochem. Elsevier; 2020;63:104950. DOI: 10.1016/J. ULTSONCH.2019.104950
24. Bühling B, Maack S, Strangfeld C. Fluidic Ultrasound Generation for Non-Destructive Testing. Advanced Materials. John Wiley and Sons Inc; 2024;36(18). DOI: 10.1002/ADMA.202311724
25. Moisello E, Novaresi L, Sarkar E, Malcovati P, Costa TL, Bonizzoni E. PMUT and CMUT Devices for Biomedical Applications: A Review. IEEE Access. Institute of Electrical and Electronics Engineers Inc.; 2024;12:18640–57. DOI: 10.1109/ACCESS.2024.3359906
26. Cheng X, Zhang M, Xu B, Adhikari B, Sun J. The principles of ultrasound and its application in freezing related processes of food materials: A review. Ultrason Sonochem. Elsevier; 2015;27:576–85. DOI: 10.1016/J.ULTSONCH.2015.04.015
27. Magsi H, Sodhro AH, Chachar FA, Abro SAK. Analysis of signal noise reduction by using filters. 2018 International Conference on Computing, Mathematics and Engineering Technologies: Invent, Innovate and Integrate for Socioeconomic Development, iCoMET 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc.; 2018;2018January:1–6. DOI: 10.1109/ICOMET.2018.8346412
28. Kim D, Goldstein B, Tang W, Sigworth FJ, Culurciello E. Noise analysis and performance comparison of low current measurement systems for biomedical applications. IEEE Trans Biomed Circuits Syst. 2013;7(1):52–62. DOI: 10.1109/TBCAS.2012.2192273
29. Alaybeyoğlu, E. A New Implementation of Capacitor Multiplier with Cell-Based Variable Transconductance Amplifier. IET Circuits, Devices & Systems. (2019); DOI: 13. 10.1049/iet-cds.2018.5217.
30. Khan AA, Bimal S, Dey KK, Roy SS. Current conveyor based R- and multiplier circuits. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2002;56(5):312–6. DOI: 10.1078/1434-8411-54100121
31. Sakaci B, Ozenli D. An Electronically Tunable Capacitance Multiplier Structure Using DTMOS Technique for the Low Frequency Applications. International Conference on Electrical, Computer and Energy Technologies, ICECET 2023. Institute of Electrical and Electronics Engineers Inc.; 2023; DOI: 10.1109/ICECET58911.2023.10389302
32. Aghaei Jeshvaghani M, Dolatshahi M. A new ultra-low power wide tunable capacitance multiplier circuit in subthreshold region for biomedical applications. AEU - International Journal of Electronics and Communications. Urban & Fischer; 2024;177:155166. DOI: 10.1016/J.AEUE.2024.155166
33. Satansup J, Tangsrirat W. Compact VDTA-based current-mode electronically tunable universal filters using grounded capacitors. Microelectronics J. Elsevier; 2014;45(6):613–8. DOI: 10.1016/J.MEJO.2014.04.008
34. Alaybeyoğlu E, Kuntman H. CMOS implementations of VDTA based frequency agile filters for encrypted communications. Analog Integr Circuits Signal Process. Springer New York LLC; 2016;89(3):675–84. DOI: 10.1007/S10470-016-0760-Y/METRICS
35. Arbel AF, Goldminz L. Output stage for current-mode feedback amplifiers, theory and applications. Analog Integr Circuits Signal Process. Kluwer Academic Publishers; 1992;2(3):243–55. DOI: 10.1007/BF00276637/METRICS
36. Bisariya S, Afzal N. Design and implementation of CDTA: a review. Sadhana - Academy Proceedings in Engineering Sciences. Springer; 2020;45(1). DOI: 10.1007/S12046-02001511-1
37. Sakaci B, Ozenli D, Kuntman HH. An Electronically Tunable Capacitance Multiplier Employing Single Active Block For The Speech Processing Applications. 14th International Conference on Electrical and Electronics Engineering, ELECO 2023 -Proceedings. Institute of Electrical and Electronics Engineers Inc.; 2023; DOI: 10.1109/ELECO60389.2023.10416079
38. Razavi Behzad. RF microelectronics. Prentice Hall PTR; 20081998;335.
39. Horowitz P, Hill W. Art of Electronics, The. Camb.U.P.; 2011; Available from: https://books.google.com/books/about/The_ Art_of_Electronics.html?hl=tr&id=LAiWPwA ACAAJ
40. Buckingham MJ. Noise in electronic devices and systems. E. Horwood ; Halsted Press; 1983;372.
41. Allen PE., Holberg DR. CMOS analog circuit design. Oxford University Press; 1987;701.