Yıl 2020, Cilt 4 , Sayı 2, Sayfalar 85 - 91 2020-04-01

LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC

Ersin ALAYBEYOĞLU [1]


In this work, low-power dynamic comparator is presented with auto-zeroing for successive approximation register (SAR) analogue-to-digital converter (ADC). The comparator designed with DTMOS technique operates in sub-threshold region. The designed circuit consumes low power with high gain.  The dynamic range of the comparator is increased with a new biasing technique for DTMOS transistors. The core design consumes 6.01µW power and overall design consumes 17.06µW. The design is realized with two supply ranging from 600mV (core design) to 1.8V (biasing circuit). The comparator has been simulated with 0.18µm TSMC process in Cadence environment. 

SAR ADC, Comparator, CMOS analog integrated circuits
  • Achigui, Hervé Facpong, Christian Jésus B Fayomi, Mohamad Sawan, and PMC-Sierra. 2006. “1-V DTMOS-Based Class-AB Operational Amplifier: Implementation and Experimental Results.” IEEE Journal of Solid-State Circuits 41(11): 2440–48.
  • Alaybeyoğlu, Ersin, and Hakan Kuntman. 2016. “CMOS Implementations of VDTA Based Frequency Agile Filters for Encrypted Communications.” Analog Integrated Circuits and Signal Processing 89(3): 675–84.
  • Allen, P. E., and D. R. Holberg. 2012. CMOS Analog Circuit Design. Oxford uni.
  • Belloni, Massimiliano, Edoardo Bonizzoni, Andrea Fornasari, and Franco Maloberti. 2010. “A Micropower Chopper - CDS Operational Amplifier.” IEEE Journal of Solid-State Circuits 45(12): 2521–29.
  • Cohen, M H et al. 2005. “A Floating-Gate Comparator with Automatic Offset Adaptation for 10-Bit Data Conversion A 750MHz 6b Adaptive Floating Gate Quantizer In.” 52(August): 1316–26.
  • Ding, Ming et al. 2018. “A Hybrid Design Automation Tool for SAR ADCs in IoT.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26(12): 2853–62.
  • Enz, C., and Gabor Temes. 1996. “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization.” Proc. of the IEEE 84(1): 1584–1614.
  • Kim, Kichan, Keun Yeong Choi, and Hojin Lee. 2015. “A-InGaZnO Thin-Film Transistor-Based Operational Amplifier for an Adaptive DC-DC Converter in Display Driving Systems.” IEEE Transactions on Electron Devices 62(4): 1189–94.
  • Lin, Chin Yu, Yen Hsin Wei, and Tai Cheng Lee. 2018. “A 10-Bit 2.6-GS/s Time-Interleaved SAR ADC with a Digital-Mixing Timing-Skew Calibration Technique.” IEEE Journal of Solid-State Circuits 53(5): 1508–17.
  • Lu, Junjie, and Jeremy Holleman. 2013. “A Low-Power High-Precision Comparator with Time-Domain Bulk-Tuned Offset Cancellation.” IEEE Transactions on Circuits and Systems I: Regular Papers 60(5): 1158–67.
  • Maloberti, F. 2006. Analog Design for CMOS VLSI Systems. Springer S.
  • Ming-Dou Ker, and Jung-Sheng Chen. 2008. “Impact of MOSFET Gate-Oxide Reliability on CMOS Operational Amplifier in a 130-Nm Low-Voltage Process.” IEEE Transactions on Device and Materials Reliability 8(2): 394–405.
  • Palmisano G., Palumbo G. and Pennisi S. 1999. CMOS Current Amplifiers. Boston MA: Kluwer Academic Publishers.
  • Pipino, A et al. 2016. “A Rail-to-Rail-Input Chopper Instrumentation Amplifier in 28nm CMOS.” Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems 2016-March: 73–76.
  • Ramírez-Angulo, J, R G Carvajal, J Tombs, and A Torralba. 2001. “Low-Voltage CMOS Op-Amp with Rail-to-Rail Input and Output Signal Swing for Continuous-Time Signal Processing Using Multiple-Input Floating-Gate Transistors.” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 48(1): 111–15.
  • Schinkel, Daniël et al. 2007. “A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+hold Time.” Digest of Technical Papers - IEEE International Solid-State Circuits Conference: 314–16.
  • Sepke, Todd et al. 2006. “Switched-Capacitor Circuits for Scaled CMOS Technologies.” ISSCC Dig. Tech. Papers 41(12): 2658–68.
  • Shim, Junbo, Min Kyu Kim, Seong Kwan Hong, and Oh Kyong Kwon. 2018. “An Ultra-Low-Power 16-Bit Second-Order Incremental ADC with SAR-Based Integrator for IoT Sensor Applications.” IEEE Transactions on Circuits and Systems II: Express Briefs 65(12): 1899–1903.
  • Verma, Naveen, and Anantha P. Chandrakasan. 2007. “An Ultra Low Energy 12-Bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes.” IEEE Journal of Solid-State Circuits 42(6): 1196–1205.
  • Wicht, Bernhard, Thomas Nirschl, and Doris Schmitt-Landsiedel. 2004. “Yield and Speed Optimization of a Latch-Type Voltage Sense Amplifier.” IEEE Journal of Solid-State Circuits 39(7): 1148–58.
  • Witte, Johan F., Kofi A.A. Makinwa, and Johan H. Huijsing. 2006. “A CMOS Chopper Offset-Stabilized Opamp.” ESSCIRC 2006 - Proceedings of the 32nd European Solid-State Circuits Conference 42(7): 360–63.
  • Wong, K. L J, and C. K K Yang. 2004. “Offset Compensation in Comparators with Minimum Input-Referred Supply Noise.” IEEE Journal of Solid-State Circuits 39(5): 837–40.
  • Wu, Rong, Kofi A. A. Makinwa, and Johan H. Huijsing. 2009. “A Chopper Current-Feedback Instrumentation Amplifier With a 1 MHz 1/f Noise Corner and an AC-Coupled Ripple Reduction Loop.” IEEE Journal of Solid-State Circuits 44(12): 3232–43.
  • Yan, Na et al. 2018. “A 10-Bit 16-MS/s Ultra Low Power SAR ADC for IoT Applications.” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings: 1–3.
  • Zhong, Xiaopeng, Amine Bermak, and Chi Ying Tsui. 2017. “A Low-Offset Dynamic Comparator with Area-Efficient and Low-Power Offset Cancellation.” IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC.
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Orcid: 0000-0002-8318-4081
Yazar: Ersin ALAYBEYOĞLU (Sorumlu Yazar)
Kurum: BARTIN UNIVERSITY
Ülke: Turkey


Tarihler

Yayımlanma Tarihi : 1 Nisan 2020

Bibtex @araştırma makalesi { tuje625475, journal = {Turkish Journal of Engineering}, issn = {}, eissn = {2587-1366}, address = {Mersin Üniversitesi Mühendislik Fakültesi Çiftlikköy Kampüsü 33343, MERSİN}, publisher = {Murat YAKAR}, year = {2020}, volume = {4}, pages = {85 - 91}, doi = {10.31127/tuje.625475}, title = {LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC}, key = {cite}, author = {ALAYBEYOĞLU, Ersin} }
APA ALAYBEYOĞLU, E . (2020). LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC. Turkish Journal of Engineering , 4 (2) , 85-91 . DOI: 10.31127/tuje.625475
MLA ALAYBEYOĞLU, E . "LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC". Turkish Journal of Engineering 4 (2020 ): 85-91 <https://dergipark.org.tr/tr/pub/tuje/issue/51649/625475>
Chicago ALAYBEYOĞLU, E . "LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC". Turkish Journal of Engineering 4 (2020 ): 85-91
RIS TY - JOUR T1 - LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC AU - Ersin ALAYBEYOĞLU Y1 - 2020 PY - 2020 N1 - doi: 10.31127/tuje.625475 DO - 10.31127/tuje.625475 T2 - Turkish Journal of Engineering JF - Journal JO - JOR SP - 85 EP - 91 VL - 4 IS - 2 SN - -2587-1366 M3 - doi: 10.31127/tuje.625475 UR - https://doi.org/10.31127/tuje.625475 Y2 - 2019 ER -
EndNote %0 Turkish Journal of Engineering LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC %A Ersin ALAYBEYOĞLU %T LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC %D 2020 %J Turkish Journal of Engineering %P -2587-1366 %V 4 %N 2 %R doi: 10.31127/tuje.625475 %U 10.31127/tuje.625475
ISNAD ALAYBEYOĞLU, Ersin . "LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC". Turkish Journal of Engineering 4 / 2 (Nisan 2020): 85-91 . https://doi.org/10.31127/tuje.625475
AMA ALAYBEYOĞLU E . LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC. TUJE. 2020; 4(2): 85-91.
Vancouver ALAYBEYOĞLU E . LOW-POWER DYNAMIC COMPARATOR WITH HIGH PRECISION FOR SAR ADC. Turkish Journal of Engineering. 2020; 4(2): 91-85.