Çok Fonksiyonlu DDCC+ Tabanlı Akım-Modlu Dört Bölgeli Çarpma Devresi
Abstract
Keywords
DDDC+, Translineer Devre Teorisi, Akım Modlu, Çarpma Devresi
References
- Beyraghi, N., & Khoei, A. (2015). CMOS design of a low power and high precision four-quadrant analog multiplier. AEU-International Journal of Electronics and Communications, 69(1), 400-407.
- Chiu, W., Liu, S. I., Tsao, H. W., & Chen, J. J. (1996). CMOS differential difference current conveyors and their applications. IEE Proceedings-Circuits, Devices and Systems, 143(2), 91-96.
- dos Santos, R. B., Souza, G. A., & Faria, L. A. (2021). A novel four-quadrant/one-quadrant multiplier circuit. AEU-International Journal of Electronics and Communications, 138, 153865.
- Gilbert, B. (1975). Translinear circuits: A proposed classification. Electronics letters, 1(11), 14-16.
- Herath, H. M. V. R., & Wimalarathna, G. H. I. (2018). An Eight-Octant bipolar junction transistor analog multiplier circuit and its applications. Ceylon Journal of Science, 47(2), 143-151.
- Kasimis, C., & Psychalinos, C. (2011). 0.65 V class-AB current-mode four-quadrant multiplier with reduced power dissipation. AEU-International Journal of Electronics and Communications, 65(7), 673-677.
- Keleş, S., & Kuntman, H. H. (2011). Four quadrant FGMOS analog multiplier. Turkish Journal of Electrical Engineering and Computer Sciences, 19(2), 291-301.
- Kumngern, M. (2013, June). A DXCCII-based four-quadrant multiplier. In 2013 IEEE 7th International Power Engineering and Optimization Conference (PEOCO) (pp. 738-741). IEEE.
- Lawanwisut, S., Satthaphol, P., Payakkakul, K., Pipatthitikorn, P., & Siripruchyanun, M. (2016). A temperature-insensitive current-mode multiplier/divider using only double-output VDTA. Procedia Computer Science, 86, 156-159.
- METU-Department of Electrical and Electronics Engineering, (2010). EE 313 Analog Electronics Laboratory. İnternet Sayfası: http://homes.ieu.edu.tr/maskar/EEE331/General/Spice_Tutorial_ver2010.pdf Son Erişim: 19.07.2023