Multi-Function DDCC+ Based Current-Mode Four-Quadrant Multiplier Circuit

Year 2023, Volume: 15 Issue: 3, 42 - 48, 31.12.2023

Tayfun Unuk

https://doi.org/10.29137/umagd.1317071

Abstract

In this paper, positive type Differential Difference Current Conveyour (DDCC+) and BJT-based multi-function four-quadrant current-mode multiplier circuit is proposed using translinear circuit theory. After the theoretical analysis of the outputs of the circuit outputs, they are simulated in the SPICE program. During the simulation, CA 3046 and 0.18 µm TSMC CMOS technology parameters are used.

Keywords

Translinear Circuit Theory, Current-Mode, DDDC+, Multiplication Circuit

Çok Fonksiyonlu DDCC+ Tabanlı Akım-Modlu Dört Bölgeli Çarpma Devresi

Abstract

Bu makalede translineer devre teorisi kullanılarak pozitif tip Diferansiye Fark Akım Taşıyıcı (DDCC+) ve BJT tabanlı çok fonksiyonlu dört bölgeli akım modlu çarpma devresi önerilmiştir. Devreye ait çıkışların teorik analizlerinin ardından SPICE programında benzetimi yapılmıştır. Benzetim sırasında CA 3046 ve 0.18 µm TSMC CMOS teknoloji parametreleri kullanılmıştır.

Keywords

DDDC+, Translineer Devre Teorisi, Akım Modlu, Çarpma Devresi

References

• Beyraghi, N., & Khoei, A. (2015). CMOS design of a low power and high precision four-quadrant analog multiplier. AEU-International Journal of Electronics and Communications, 69(1), 400-407.
• Chiu, W., Liu, S. I., Tsao, H. W., & Chen, J. J. (1996). CMOS differential difference current conveyors and their applications. IEE Proceedings-Circuits, Devices and Systems, 143(2), 91-96.
• dos Santos, R. B., Souza, G. A., & Faria, L. A. (2021). A novel four-quadrant/one-quadrant multiplier circuit. AEU-International Journal of Electronics and Communications, 138, 153865.
• Gilbert, B. (1975). Translinear circuits: A proposed classification. Electronics letters, 1(11), 14-16.
• Herath, H. M. V. R., & Wimalarathna, G. H. I. (2018). An Eight-Octant bipolar junction transistor analog multiplier circuit and its applications. Ceylon Journal of Science, 47(2), 143-151.
• Kasimis, C., & Psychalinos, C. (2011). 0.65 V class-AB current-mode four-quadrant multiplier with reduced power dissipation. AEU-International Journal of Electronics and Communications, 65(7), 673-677.
• Keleş, S., & Kuntman, H. H. (2011). Four quadrant FGMOS analog multiplier. Turkish Journal of Electrical Engineering and Computer Sciences, 19(2), 291-301.
• Kumngern, M. (2013, June). A DXCCII-based four-quadrant multiplier. In 2013 IEEE 7th International Power Engineering and Optimization Conference (PEOCO) (pp. 738-741). IEEE.
• Lawanwisut, S., Satthaphol, P., Payakkakul, K., Pipatthitikorn, P., & Siripruchyanun, M. (2016). A temperature-insensitive current-mode multiplier/divider using only double-output VDTA. Procedia Computer Science, 86, 156-159.
• METU-Department of Electrical and Electronics Engineering, (2010). EE 313 Analog Electronics Laboratory. İnternet Sayfası: http://homes.ieu.edu.tr/maskar/EEE331/General/Spice_Tutorial_ver2010.pdf Son Erişim: 19.07.2023
• Minaei, S., & Yuce, E. (2010). Novel voltage-mode all-pass filter based on using DVCCs. Circuits, Systems and Signal Processing, 29, 391-402. 0.18 um
• Myderrizi, I., Minaei, S., & Yuce, E. (2011, May). CCII+ based fully CMOS four-quadrant multiplier. In 2011 24th Canadian Conference on Electrical and Computer Engineering (CCECE) (pp. 000759-000762). Ieee.
• Panigrahi, A., & Paul, P. K. (2013). A novel bulk-input low voltage and low power four quadrant analog multiplier in weak inversion. Analog Integrated Circuits and Signal Processing, 75, 237-243.
• Saatlo, A. N., & Ozoguz, S. (2012, June). CMOS design of a multi-input analog multiplier. In PRIME 2012; 8th Conference on Ph. D. Research in Microelectronics & Electronics (pp. 1-4). VDE.
• Srivastava, R., Gupta, M., & Singh, U. (2014). Low voltage floating gate MOS transistor based four-quadrant multiplier. Radioengineering, 23(4), 1150-1160.
• Tangsrirat, W., Pukkalanun, T., Mongkolwai, P., & Surakampontorn, W. (2011). Simple current-mode analog multiplier, divider, square-rooter and squarer based on CDTAs. AEU-International Journal of Electronics and Communications, 65(3), 198-203.
• Tijare, A., & Dakhole, P. (2010). VLSI Design of Four Quadrant Analog Voltage-Mode Multiplier and Its Application. In Information and Communication Technologies: International Conference, ICT 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings (pp. 50-54). Springer Berlin Heidelberg.
• Unuk, T., Arslanalp, R., & Tez, S. (2023). Design of Current-Mode versatile Multi-Input analog multiplier topology. AEU-International Journal of Electronics and Communications, 160, 154493.