Plaka Bölgesi Tespiti Problemi için Yapay Arı Koloni Algoritması ile YSA Eğitiminin APKD’de Gerçeklenmesi

Year 2021, Volume: 8 Issue: 1, 446 - 457, 30.06.2021

Mehmet Ali Çavuşlu

https://doi.org/10.35193/bseufbd.884109

Cited By: 1

Abstract

Son zamanlarda Yapay Sinir Ağı (YSA) eğitimlerinde türev bilgisi gerektiren algoritmalara alternatif olarak küresel arama özelliğine sahip evrimsel algoritmalar sıklıkla kullanılmaktadır. Bu çalışmada YSA eğitimi, evrimsel algoritmalardan Yapay Arı Koloni (YAK) algoritması ile Alan Programlanabilir Kapı Dizileri (APKD) üzerinde donanımsal gerçekleştirilmiştir. APKD tabanlı gerçeklemede sayı formatı ve aktivasyon fonksiyonu yaklaşımı maliyet, hız ve hata duyarlılığı açısından önem arz etmektedir. Çalışmada yüksek hassasiyet ve dinamiklik özelliklerine sahip IEEE 754 kayan noktalı sayı formatı seçilmiştir. Üssel fonksiyonun donanımsal gerçeklenmesinin zor olması nedeni ile aktivasyon fonksiyonunun donanımsal gerçeklenmesinde matematiksel yaklaşım kullanılmıştır. Çalışmada araç plaka bölgesi tespiti probleminin çözümüne yönelik YSA mimarisi tasarlanmış ve YAK algoritması ile APKD üzerinde eğitilmiştir. Eğitilen ağın test verilerindeki %98.82 başarımı, APDK üzerinde eğitilen YSA’nın iyi bir genelleme yaptığını ve sentezleme sonuçları, uygulamanın APDK’da sadece %9’luk alan tüketimi ile gerçekleştirilebildiğini göstermiştir.

Keywords

FPGA, YSA, YAK, Kayan Noktalı Sayılar, Plaka Bölge Tespiti

Implementation of ANN Training with Artificial Bee Colony Algorithm for Plate Region Detection Problem on FPGA

Abstract

Recently, evolutionary algorithms with global search feature are frequently used as an alternative to algorithms that require derivative knowledge in Artificial Neural Network (ANN) trainings. In this study, ANN training was carried out on Field Programmable Gate Arrays (FPGA) with the Artificial Bee Colony (ABC) algorithm, one of the evolutionary algorithms. Number format and activation function approach is important in terms of cost, speed and error sensitivity in FPGA-based implementation. In the study, IEEE 754 floating point number format, which has high sensitivity and dynamism features, was chosen. Since the hardware implementation of the exponential function is difficult, a mathematical approach was used in the hardware implementation of the activation function. In the study, ANN architecture was designed to solve the problem of vehicle license plate region detection and trained on FPGA with ABC algorithm. 98.82% success of the trained network in the test data showed that the ANN trained on FPGA made a good generalization and the synthesis results showed that the application could be realized with only 9% area consumption in FPGA.

Keywords

FPGA, ANN, ABC, Floating Point Number, Plate Region Detection

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