Abstract
OTSU, gri seviye görüntülerin bölütlenebilmesinde kullanılabilen bir eşik tespit metodudur. Görüntünün başarılı bir şekilde bölütlenmesinde eşik değeri büyük önem taşımaktadır. Eşik değerinin çok büyük seçilmesi ile oluşturulacak yeni görüntüde yanlışlıkla pikselerin birçoğu beyaz, küçük seçilmesi durumunda ise siyah olacaktır ve görüntüde saklanan veri azalacaktır. Belki de aranan bilgi kaçırılacaktır. Ayrıca OTSU metodunda, ortamdaki ışık değişimlerinden bölütleme sonucunun en az şekilde etkilenmesini sağlayarak eşik değeri otomatik olarak hesaplanmaktadır. OTSU metodunun gerçek zamanlı olarak görüntüye uygulanabilmesinde iş yükünün çok fazla olmasından dolayı yüksek kapasiteli ve maliyetli donanımlara ihtiyaç duyulmaktadır. Bu çalışmada yüksek işlem kapasitesine sahip olması ve düşük maliyeti olması sebebiyle FPGA kullanılmıştır. Gerçek zamanlı görüntülerin bölütlemesinde FPGA ile başarılı sonuçlar alınmıştır.
Supporting Institution
TARIMSAL ARAŞTIRMALAR VE POLİTİKALAR GENEL MÜDÜRLÜĞÜ
Project Number
TAGEM/16/AR-GE/60)
References
- Seow M. J. and Asari K. V, “A parallel VLSI architecture for real-time segmentation of images with complex background environment,” Proc. 10th NASA Sym. on VLSI Design, Albuquerque, New Mexico, USA, 2002, pp. 1031-1036.
- Wang J., Yang C., Zhu M., Wang C., “Implementation of Otsu's Thresholding Process Based on FPGA”, ICIEA, 479-483, 2009.
- Bochem A., Kent K. B., Herpers R., “FPGA based Real-Time Object Detection Approach with Validation of Precision and Performance”, 22nd IEEE International Symposium on Rapid System Prototyping, 9-15, 2011.
- Ozsarac I. and Ulusoy I., “Tam Arama Video Sabitleme Yönteminin Gerçek Zamanlı FPGA Uygulaması”, 20th Signal Processing And Communications Applications Conference (SIU), 1-4, 2012.
- Ladgaonkar A., Balsundar P., Konde V. and Raj A. N., “FPGA Based Implementation of Ratio Histogram”, International Journal of Advances in Engineering & Technology, 747-752, 2015.
- Xia H., Key S., Su X., Liu P., Liu B., “A design of mosaic line-scan camera based on FPGA”, Computer and Information Science (ICIS), 455 – 458, 2014.
- Vala H. J. and Baxi A., “A Review on Otsu Image Segmentation Algorithm”, International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 387-389, 2013.
- Altera, http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=281&PartNo=3, TRDB-D5M User Manual, 11,07.2016.
Abstract
OTSU is a threshold value calculation method, which use to segmentation of grayscale images. Threshold value is very important for successful segmentation of the images. If you mistakenly select big threshold value, many pixels in the new image will be white or If you select small threshold value, a lot of pixels in the new image will be black and data stored in the image will be reduced. Maybe the requested data will be lost. In addition, the threshold value is calculated automatically with OTSU method ensuring that the segmentation result is minimally affected from change in ambient light. Because the OTSU method can be applied to the image in real time, high capacity and costly equipment are required due to the high processing load.This study was used in the FPGA due to its low cost and having high processing capacity.
Project Number
TAGEM/16/AR-GE/60)
References
- Seow M. J. and Asari K. V, “A parallel VLSI architecture for real-time segmentation of images with complex background environment,” Proc. 10th NASA Sym. on VLSI Design, Albuquerque, New Mexico, USA, 2002, pp. 1031-1036.
- Wang J., Yang C., Zhu M., Wang C., “Implementation of Otsu's Thresholding Process Based on FPGA”, ICIEA, 479-483, 2009.
- Bochem A., Kent K. B., Herpers R., “FPGA based Real-Time Object Detection Approach with Validation of Precision and Performance”, 22nd IEEE International Symposium on Rapid System Prototyping, 9-15, 2011.
- Ozsarac I. and Ulusoy I., “Tam Arama Video Sabitleme Yönteminin Gerçek Zamanlı FPGA Uygulaması”, 20th Signal Processing And Communications Applications Conference (SIU), 1-4, 2012.
- Ladgaonkar A., Balsundar P., Konde V. and Raj A. N., “FPGA Based Implementation of Ratio Histogram”, International Journal of Advances in Engineering & Technology, 747-752, 2015.
- Xia H., Key S., Su X., Liu P., Liu B., “A design of mosaic line-scan camera based on FPGA”, Computer and Information Science (ICIS), 455 – 458, 2014.
- Vala H. J. and Baxi A., “A Review on Otsu Image Segmentation Algorithm”, International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 387-389, 2013.
- Altera, http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=281&PartNo=3, TRDB-D5M User Manual, 11,07.2016.
Details
| Primary Language | Turkish |
|---|---|
| Subjects | Engineering |
| Journal Section | Articles |
| Authors | |
| Project Number | TAGEM/16/AR-GE/60) |
| Publication Date | April 15, 2020 |
| Published in Issue | Year 2020 Issue: 18 |
