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LabVIEW Kullanarak Dördüncü Derece Eliptik IIR Bant Geçiren Filtrenin FPGA Tasarımı

Year 2021, Issue: 26 - Ejosat Special Issue 2021 (HORA), 122 - 127, 31.07.2021
https://doi.org/10.31590/ejosat.951601

Abstract

Sonsuz dürtü yanıt filtreleri, yüksek seçicilik ve hesaplama verimliliği nedeniyle görüntü işleme, dijital sinyal işleme ve telekomünikasyon gibi modern elektrik mühendisliği uygulamalarının talebini karşılamak için sıklıkla kullanılır. Görev açısından kritik gerçek zamanlı uygulamalarda, hesaplama gecikmesi genellikle kabul edilemez. Verilerin ve katsayıların yüksek hızda işlenmesi, genel amaçlı bir mikroişlemci yerine bir dijital sinyal işlemcisi veya bir FPGA gerektirir. Son yirmi yılda, FPGA'lar paralellik ile belirlenen ölçeklenebilir performans ve çalışma zamanı yeniden yapılandırılabilirliği nedeniyle birçok sinyal işleme alanına uygulanmıştır. Bu çalışma, dördüncü dereceden ayrık zamanlı IIR eliptik bant geçiren filtrenin LabVIEW tabanlı FPGA donanım tasarımını sunar. Tasarlanan filtre, 1dB geçiş bandı dalgalanması ve 80dB durdurma bandı zayıflaması ile 2 kHz düşük ve 2.5 kHz yüksek kesme frekanslarına sahiptir. Tasarlanan filtrenin beklenen davranışı, geliştirilen VHDL modelinin işlevsel simülasyonu ile doğrulanmıştır. LabVIEW FPGA kaynak tahmini, önerilen tasarım için küçük bir ayak izi rapor etmiştir.

References

  • Venieris, S. I., & Bouganis, C. S. (2017, September). Latency-driven design for FPGA-based convolutional neural networks. In 2017 27th International Conference on Field Programmable Logic and Applications (FPL) (pp. 1-8). IEEE.
  • Tatar, G., Kılıç, O., & Bayar, S. (2019, November). FPGA Based Fault Distance Detection and Positioning of Underground Energy Cable by Using GSM/GPRS. In 2019 International Symposium on Advanced Electrical and Communication Technologies (ISAECT) (pp. 1-6). IEEE.
  • Pal, R. (2017, December). Comparison of the design of FIR and IIR filters for a given specification and removal of phase distortion from IIR filters. In 2017 International Conference on Advances in Computing, Communication and Control (ICAC3) (pp. 1-3). IEEE.
  • Paul, A., Khan, T. Z., Podder, P., Hasan, M. M., & Ahmed, T. (2015, February). Reconfigurable architecture design of FIR and IIR in FPGA. In 2015 2nd International Conference on Signal Processing and Integrated Networks (SPIN) (pp. 958-963). IEEE.
  • Shukl, P., & Singh, B. (2020). Combined IIR and FIR filter for improved power quality of PV interfaced utility grid. IEEE Transactions on Industry Applications, 57(1), 774-783.
  • Seshadri, R., & Ramakrishnan, S. (2021). FPGA implementation of fast digital FIR and IIR filters. Concurrency and Computation: Practice and Experience, 33(3), e5246.
  • (2021, March 11). Difference between IIR and FIR filters: a practical design guide. https://www.advsolned.com/differ ence-between-iir-and-fir-filters-a-practical-design-guide/.
  • (2021, March 11). Know all About FIR Filters in Digital Signal Processing. https://www.elprocus.com/fir-filter-for-digital-signal-processing/.
  • (2021, February 2). Digital Elliptic Filter Design 13.3 Digital Elliptic Filter Design. https://community.ptc.com/sejnu66972 /attachments/sejnu66972/PTCMathcad/176202/1/13.3 Digi- tal Elliptic Filter Design.pdf.
  • Getu, B. N. (2020, November). Digital IIR Filter Design using Bilinear Transformation in MATLAB. In 2020 International Conference on Communications, Computing, Cybersecurity, and Informatics (CCCI) (pp. 1-6). IEEE.
  • Zhang, D., Chen, L., & Wu, Y. (2020, November). Research on High Precision FFT Algorithm Based on FPGA. In 2020 5th International Conference on Intelligent Informatics and Biomedical Sciences (ICIIBMS) (pp. 42-46). IEEE.
  • Savran, I. (2017). Donanım Tanımlama Dili VHDL ve FPGA Uygulamaları. İstanbul: PapatyaBilim.
  • Owen, J., & Henry, M. (2018, October). 384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing. In IECON 2018-44th Annual Conference of the IEEE Industrial Electronics Society (pp. 2659-2664). IEEE.
  • Samanta, S., & Chakraborty, M. (2014, March). FPGA based implementation of high speed tunable notch filter using pipelining and unfolding. In 2014 Twentieth National Conference on Communications (NCC) (pp. 1-6). IEEE.
  • Singh, R., & Arya, S. K. (2012). Genetic algorithm for the design of Optimal IIR Digital filters.

FPGA Design of a Fourth Order Elliptic IIR Band-Pass Filter Using LabVIEW

Year 2021, Issue: 26 - Ejosat Special Issue 2021 (HORA), 122 - 127, 31.07.2021
https://doi.org/10.31590/ejosat.951601

Abstract

Infinite impulse response filters are often used to meet the demand of modern electrical engineering applications such as image processing, digital signal processing and telecommunications because of the high selectivity and computational efficiency. In mission-critical real-time applications, computational latency is usually intolerable. High-speed processing of data and the coefficients require a digital signal processor or an FPGA instead of a general-purpose microprocessor. In the last two decades, FPGAs have been applied to many fields of signal processing due to parallelism determined scalable performance and run-time reconfigurability. This study presents a LabVIEW driven FPGA hardware design of a fourth-order discrete-time IIR elliptic band-pass filter. The designed filter has 2 kHz low and 2.5 kHz high cut-off frequencies with 1dB pass-band ripple and 80dB stop-band attenuation. The expected behavior of the designed filter has been confirmed by the functional simulation of the developed VHDL model. LabVIEW FPGA resource estimation reports a compact footprint for the proposed design.

References

  • Venieris, S. I., & Bouganis, C. S. (2017, September). Latency-driven design for FPGA-based convolutional neural networks. In 2017 27th International Conference on Field Programmable Logic and Applications (FPL) (pp. 1-8). IEEE.
  • Tatar, G., Kılıç, O., & Bayar, S. (2019, November). FPGA Based Fault Distance Detection and Positioning of Underground Energy Cable by Using GSM/GPRS. In 2019 International Symposium on Advanced Electrical and Communication Technologies (ISAECT) (pp. 1-6). IEEE.
  • Pal, R. (2017, December). Comparison of the design of FIR and IIR filters for a given specification and removal of phase distortion from IIR filters. In 2017 International Conference on Advances in Computing, Communication and Control (ICAC3) (pp. 1-3). IEEE.
  • Paul, A., Khan, T. Z., Podder, P., Hasan, M. M., & Ahmed, T. (2015, February). Reconfigurable architecture design of FIR and IIR in FPGA. In 2015 2nd International Conference on Signal Processing and Integrated Networks (SPIN) (pp. 958-963). IEEE.
  • Shukl, P., & Singh, B. (2020). Combined IIR and FIR filter for improved power quality of PV interfaced utility grid. IEEE Transactions on Industry Applications, 57(1), 774-783.
  • Seshadri, R., & Ramakrishnan, S. (2021). FPGA implementation of fast digital FIR and IIR filters. Concurrency and Computation: Practice and Experience, 33(3), e5246.
  • (2021, March 11). Difference between IIR and FIR filters: a practical design guide. https://www.advsolned.com/differ ence-between-iir-and-fir-filters-a-practical-design-guide/.
  • (2021, March 11). Know all About FIR Filters in Digital Signal Processing. https://www.elprocus.com/fir-filter-for-digital-signal-processing/.
  • (2021, February 2). Digital Elliptic Filter Design 13.3 Digital Elliptic Filter Design. https://community.ptc.com/sejnu66972 /attachments/sejnu66972/PTCMathcad/176202/1/13.3 Digi- tal Elliptic Filter Design.pdf.
  • Getu, B. N. (2020, November). Digital IIR Filter Design using Bilinear Transformation in MATLAB. In 2020 International Conference on Communications, Computing, Cybersecurity, and Informatics (CCCI) (pp. 1-6). IEEE.
  • Zhang, D., Chen, L., & Wu, Y. (2020, November). Research on High Precision FFT Algorithm Based on FPGA. In 2020 5th International Conference on Intelligent Informatics and Biomedical Sciences (ICIIBMS) (pp. 42-46). IEEE.
  • Savran, I. (2017). Donanım Tanımlama Dili VHDL ve FPGA Uygulamaları. İstanbul: PapatyaBilim.
  • Owen, J., & Henry, M. (2018, October). 384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing. In IECON 2018-44th Annual Conference of the IEEE Industrial Electronics Society (pp. 2659-2664). IEEE.
  • Samanta, S., & Chakraborty, M. (2014, March). FPGA based implementation of high speed tunable notch filter using pipelining and unfolding. In 2014 Twentieth National Conference on Communications (NCC) (pp. 1-6). IEEE.
  • Singh, R., & Arya, S. K. (2012). Genetic algorithm for the design of Optimal IIR Digital filters.
There are 15 citations in total.

Details

Primary Language English
Subjects Engineering
Journal Section Articles
Authors

Güner Tatar 0000-0002-3664-1366

Ihsan Cicek 0000-0002-7881-1263

Salih Bayar 0000-0002-4600-1880

Publication Date July 31, 2021
Published in Issue Year 2021 Issue: 26 - Ejosat Special Issue 2021 (HORA)

Cite

APA Tatar, G., Cicek, I., & Bayar, S. (2021). FPGA Design of a Fourth Order Elliptic IIR Band-Pass Filter Using LabVIEW. Avrupa Bilim Ve Teknoloji Dergisi(26), 122-127. https://doi.org/10.31590/ejosat.951601