Research Article
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Year 2024, Volume: 17 Issue: 3, 797 - 810, 31.12.2024
https://doi.org/10.18185/erzifbed.1510542

Abstract

References

  • [1] Lin, T., Chong, K. S., Chang, J. S., & Gwee, B. H. (2012) An Ultra-Low Power Asynchronous-Logic In-Situ Self-Adaptive $ V_ {\rm DD} $ System for Wireless Sensor Networks. IEEE Journal of Solid-State Circuits, 48 (2), 573-586.
  • [2] Guo, L., Ge, T., & Chang, J. S. (2014) A 101 dB PSRR, 0.0027% THD+ N and 94% power-efficiency filterless class D amplifier. IEEE Journal of Solid-State Circuits, 49 (11), 2608-2617.
  • [3] Lee, I., Sylvester, D., & Blaauw, D. (2017) A subthreshold voltage reference with scalable output voltage for low-power IoT systems. IEEE Journal of Solid-State Circuits, 52 (5), 1443-1449.
  • [4] Wang, Q., Wang, X., Li, J., & Liu, Y. (2022) A bandgap reference voltage source design for wide temperature range. In 2022 7th International Conference on Integrated Circuits and Microsystems (ICICM) (pp. 245-250). IEEE.
  • [5] Jain, S., Kanchetla, V. K., & Zele, R. (2022) A Sub-1V, current-mode bandgap voltage reference in standard 65 nm CMOS process. In 2022 IEEE 15th Dallas Circuit And System Conference (DCAS) (pp. 1-5). IEEE.
  • [6] Basyurt, P. B., Bonizzoni, E., Maloberti, F., & Aksin, D. Y. (2017) A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems. In 2017 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1-4). IEEE.
  • [7] Shrivastava, A., Craig, K., Roberts, N. E., Wentzloff, D. D., & Calhoun, B. H. (2015) 5.4 A 32nW bandgap reference voltage operational from 0.5 V supply for ultra-low power systems. In 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of Technical Papers (pp. 1-3). IEEE.
  • [8] Lu, Y., Wang, Y., Pan, Q., Ki, W. H., & Yue, C. P. (2015) A fully-integrated low-dropout regulator with full-spectrum power supply rejection. IEEE Transactions on Circuits and Systems I: Regular Papers, 62 (3), 707-716.
  • [9] Bu, S., Leung, K. N., Lu, Y., Guo, J., & Zheng, Y. (2018) A fully integrated low-dropout regulator with differentiator-based active zero compensation. IEEE Transactions on Circuits and Systems I: Regular Papers, 65 (10), 3578-3591.
  • [10] Qu, W., Singh, S., Lee, Y., Son, Y. S., & Cho, G. H. (2016) Design-oriented analysis for Miller compensation and its application to multistage amplifier design. IEEE Journal of Solid-State Circuits, 52 (2), 517-527.
  • [11] Rajalingam, P., Jayakumar, S., & Routray, S. (2021) Design and analysis of low power and high frequency current starved sleep voltage controlled oscillator for phase locked loop application. Silicon, 13 (8), 2715-2726.
  • [12] Aranda, M. L., Díaz, O. G., & Álvarez, C. R. B. (2013) A performance comparison of CMOS voltage-controlled ring oscillators for its application to generation and distribution clock networks. Sci J Circuits Syst Sig Process, 2 (2), 56-66.
  • [13] Hwang, I. C., Kim, C., & Kang, S. M. (2004) A CMOS self-regulating VCO with low supply sensitivity. IEEE Journal of Solid-State Circuits, 39 (1), 42-48.
  • [14] Jiang, J., Shu, W., & Chang, J. S. (2016) A 5.6 ppm/° C temperature coefficient, 87-dB PSRR, sub-1-V voltage reference in 65-nm CMOS exploiting the zero-temperature-coefficient point. IEEE Journal of Solid-State Circuits, 52 (3), 623-633.
  • [15] Sobhan Bhuiyan, M. A., Hossain, M. R., Minhad, K. N., Haque, F., Hemel, M. S. K., Md Dawi, O., & Ooi, K. J. (2022) CMOS low-dropout voltage regulator design trends: an overview. Electronics, 11 (2), 193.
  • [16] Kang, J. G., Park, J., Jeong, M. G., & Yoo, C. (2021) Digital low-dropout regulator with voltage-controlled oscillator based control. IEEE Transactions on Power Electronics, 37(6), 6951-6961.
  • [17] Kang, J. G., Park, J., Jeong, M. G., & Yoo, C. (2021) Digital low-dropout regulator with voltage-controlled oscillator based control. IEEE Transactions on Power Electronics, 37(6), 6951-6961.
  • [18] Silva-Martinez, J., Liu, X., & Zhou, D. (2020) Recent advances on linear low-dropout regulators. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(2), 568-573.
  • [19] Cao, H., Yang, X., Li, W., Ding, Y., & Qu, W. (2021) An impedance adapting compensation scheme for high current NMOS LDO design. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(7), 2287-2291.
  • [20] Annamma, K., Saxena, S., & Patel, G. S. (2022) Sleepy Stack CSVCO with wide tuning and low power for PLL applications. In Journal of Physics: Conference Series (Vol. 2327, No. 1, p. 012013). IOP Publishing.
  • [21] Panigrahi, J. K., Acharya, D. P., & Nanda, U. (2022) Performance Analysis of Dual Threshold CMOS based Current Starved Voltage Controlled Oscillator-A Review. In 2022 2nd International Conference on Artificial Intelligence and Signal Processing (AISP) (pp. 1-4). IEEE.
  • [22] Prajapati, A., & Prajapati, P. P. (2014) Analysis of Current Starved Voltage Controlled Oscillator using 45nm CMOS Technology. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 3(3), 8076.

Voltage Controlled Oscillator Realisation with Temperature and Source Independent Circuits

Year 2024, Volume: 17 Issue: 3, 797 - 810, 31.12.2024
https://doi.org/10.18185/erzifbed.1510542

Abstract

In this article, a square wave was generated with a voltage-controlled oscillator circuit (VCO) using a bandgap reference voltage circuit and a low drop-out (LDO) circuit. The band gap reference circuit can generate a constant 500mV voltage between -40⁰C and +125⁰C. The LDO circuit is driven by a bandgap reference voltage circuit and exhibits a stable output even at different voltage levels. The last circuit, VCO, is driven by the LDO circuit. It can generate square waves between 1200MHz and 1600MHz at the output. Simulations using 130nm TSMC technology parameters have been successfully achieved.

References

  • [1] Lin, T., Chong, K. S., Chang, J. S., & Gwee, B. H. (2012) An Ultra-Low Power Asynchronous-Logic In-Situ Self-Adaptive $ V_ {\rm DD} $ System for Wireless Sensor Networks. IEEE Journal of Solid-State Circuits, 48 (2), 573-586.
  • [2] Guo, L., Ge, T., & Chang, J. S. (2014) A 101 dB PSRR, 0.0027% THD+ N and 94% power-efficiency filterless class D amplifier. IEEE Journal of Solid-State Circuits, 49 (11), 2608-2617.
  • [3] Lee, I., Sylvester, D., & Blaauw, D. (2017) A subthreshold voltage reference with scalable output voltage for low-power IoT systems. IEEE Journal of Solid-State Circuits, 52 (5), 1443-1449.
  • [4] Wang, Q., Wang, X., Li, J., & Liu, Y. (2022) A bandgap reference voltage source design for wide temperature range. In 2022 7th International Conference on Integrated Circuits and Microsystems (ICICM) (pp. 245-250). IEEE.
  • [5] Jain, S., Kanchetla, V. K., & Zele, R. (2022) A Sub-1V, current-mode bandgap voltage reference in standard 65 nm CMOS process. In 2022 IEEE 15th Dallas Circuit And System Conference (DCAS) (pp. 1-5). IEEE.
  • [6] Basyurt, P. B., Bonizzoni, E., Maloberti, F., & Aksin, D. Y. (2017) A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems. In 2017 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1-4). IEEE.
  • [7] Shrivastava, A., Craig, K., Roberts, N. E., Wentzloff, D. D., & Calhoun, B. H. (2015) 5.4 A 32nW bandgap reference voltage operational from 0.5 V supply for ultra-low power systems. In 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of Technical Papers (pp. 1-3). IEEE.
  • [8] Lu, Y., Wang, Y., Pan, Q., Ki, W. H., & Yue, C. P. (2015) A fully-integrated low-dropout regulator with full-spectrum power supply rejection. IEEE Transactions on Circuits and Systems I: Regular Papers, 62 (3), 707-716.
  • [9] Bu, S., Leung, K. N., Lu, Y., Guo, J., & Zheng, Y. (2018) A fully integrated low-dropout regulator with differentiator-based active zero compensation. IEEE Transactions on Circuits and Systems I: Regular Papers, 65 (10), 3578-3591.
  • [10] Qu, W., Singh, S., Lee, Y., Son, Y. S., & Cho, G. H. (2016) Design-oriented analysis for Miller compensation and its application to multistage amplifier design. IEEE Journal of Solid-State Circuits, 52 (2), 517-527.
  • [11] Rajalingam, P., Jayakumar, S., & Routray, S. (2021) Design and analysis of low power and high frequency current starved sleep voltage controlled oscillator for phase locked loop application. Silicon, 13 (8), 2715-2726.
  • [12] Aranda, M. L., Díaz, O. G., & Álvarez, C. R. B. (2013) A performance comparison of CMOS voltage-controlled ring oscillators for its application to generation and distribution clock networks. Sci J Circuits Syst Sig Process, 2 (2), 56-66.
  • [13] Hwang, I. C., Kim, C., & Kang, S. M. (2004) A CMOS self-regulating VCO with low supply sensitivity. IEEE Journal of Solid-State Circuits, 39 (1), 42-48.
  • [14] Jiang, J., Shu, W., & Chang, J. S. (2016) A 5.6 ppm/° C temperature coefficient, 87-dB PSRR, sub-1-V voltage reference in 65-nm CMOS exploiting the zero-temperature-coefficient point. IEEE Journal of Solid-State Circuits, 52 (3), 623-633.
  • [15] Sobhan Bhuiyan, M. A., Hossain, M. R., Minhad, K. N., Haque, F., Hemel, M. S. K., Md Dawi, O., & Ooi, K. J. (2022) CMOS low-dropout voltage regulator design trends: an overview. Electronics, 11 (2), 193.
  • [16] Kang, J. G., Park, J., Jeong, M. G., & Yoo, C. (2021) Digital low-dropout regulator with voltage-controlled oscillator based control. IEEE Transactions on Power Electronics, 37(6), 6951-6961.
  • [17] Kang, J. G., Park, J., Jeong, M. G., & Yoo, C. (2021) Digital low-dropout regulator with voltage-controlled oscillator based control. IEEE Transactions on Power Electronics, 37(6), 6951-6961.
  • [18] Silva-Martinez, J., Liu, X., & Zhou, D. (2020) Recent advances on linear low-dropout regulators. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(2), 568-573.
  • [19] Cao, H., Yang, X., Li, W., Ding, Y., & Qu, W. (2021) An impedance adapting compensation scheme for high current NMOS LDO design. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(7), 2287-2291.
  • [20] Annamma, K., Saxena, S., & Patel, G. S. (2022) Sleepy Stack CSVCO with wide tuning and low power for PLL applications. In Journal of Physics: Conference Series (Vol. 2327, No. 1, p. 012013). IOP Publishing.
  • [21] Panigrahi, J. K., Acharya, D. P., & Nanda, U. (2022) Performance Analysis of Dual Threshold CMOS based Current Starved Voltage Controlled Oscillator-A Review. In 2022 2nd International Conference on Artificial Intelligence and Signal Processing (AISP) (pp. 1-4). IEEE.
  • [22] Prajapati, A., & Prajapati, P. P. (2014) Analysis of Current Starved Voltage Controlled Oscillator using 45nm CMOS Technology. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 3(3), 8076.
There are 22 citations in total.

Details

Primary Language English
Subjects Mechanical Engineering (Other)
Journal Section Makaleler
Authors

Müslüm Gür 0000-0002-4842-5345

Yunus Babacan 0000-0002-6745-0626

Early Pub Date December 27, 2024
Publication Date December 31, 2024
Submission Date July 4, 2024
Acceptance Date September 18, 2024
Published in Issue Year 2024 Volume: 17 Issue: 3

Cite

APA Gür, M., & Babacan, Y. (2024). Voltage Controlled Oscillator Realisation with Temperature and Source Independent Circuits. Erzincan University Journal of Science and Technology, 17(3), 797-810. https://doi.org/10.18185/erzifbed.1510542