Interface Effects of Annealing Temperatures in Al/HfO2/p-Si (MIS) Structures

Year 2017, Volume: 30 Issue: 3, 273 - 280, 20.09.2017

Şadan Özden , Osman Pakma

Abstract

In this study,
Al/HfO₂/p-Si (MIS) structures were prepared by using the sol-gel
method for three different annealing temperatures.  The current-voltage (I-V) and
capacitance-voltage (C-V) characteristics of these structures were investigated
by taking into consideration the effect of the interfacial insulator layer and
surface states (N_ss) at room temperature. All of the structures showed
non-ideal I-V behaviour with ideality factor (n) in the range between 2.35 and
4.42 owing to interfacial insulator layer and surface states. The values of N_ss
and barrier height (f_b) for three samples were calculated. The values of n and N_ss
ascend with increasing the insulator layer thickness (δ) while the values of f_b decreases. 

Keywords

High dielectric materials, sol-gel, MIS devices

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