Research Article
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Year 2019, Volume: 32 Issue: 1, 164 - 173, 01.03.2019

Abstract

References

  • [1] Mohammad, Khader, Aziz Qaroush, Mahdi Washha, and Baker Mohammad. "Low-power content addressable memory (CAM) array for mobile devices." Microelectronics Journal 67, 10-18, (2017).
  • [2] Maurya, Satendra Kumar, and Lawrence T. Clark. "A dynamic longest prefix matching content addressable memory for IP routing." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19, no. 6 963-972, (2011).
  • [3] Lines, Valerie, Abdullah Ahmed, Peter Ma, Stanley Ma, Robert McKenzie, Hong-Seok Kim, and Cynthia Mar. "66 MHz 2.3 M ternary dynamic content addressable memory." In Memory Technology, Design and Testing, 2000. Records of the 2000 IEEE International Workshop on, pp. 101-105. IEEE, (2000).
  • [4] Shin, Yong-Chul, Ramalingam Sridhar, Victor Demjanenko, Paul W. Palumbo, and Sargur N. Srihari. "A special-purpose content addressable memory chip for real-time image processing." IEEE Journal of Solid-State Circuits 27, no. 5 , 737-744, (1992).
  • [5] Bremler-Barr, Anat, and Danny Hendler. "Space-efficient TCAM-based classification using gray coding." IEEE Transactions on Computers 61, no. 1, 18-30, (2012).
  • [6] Pagiamtzis, Kostas, and Ali Sheikholeslami. "Content-addressable memory (CAM) circuits and architectures: A tutorial and survey." IEEE Journal of Solid-State Circuits 41, no. 3, 712-727, (2006).
  • [7] Schultz, Kenneth J. "Content-addressable memory core cells A survey." INTEGRATION, the VLSI journal 23, no. 2 ,171-188, (1997).
  • [8] Ruan, Shanq-Jang, Chi-Yu Wu, and Jui-Yuan Hsieh. "Low power design of precomputation-based content-addressable memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 3 , 331-335, (2008).
  • [9] Chang, Yen-Jen, and Yuan-Hong Liao. "Hybrid-type CAM design for both power and performance efficiency." IEEE transactions on very large scale integration (VLSI) systems16, no. 8, 965-974, (2008).
  • [10] Chang, Yen-Jen, and Tung-Chi Wu. "Master–Slave Match Line design for low-power content-addressable memory." IEEE transactions on very large scale integration (vlsi) systems 23, no. 9, 1740-1749, (2015).
  • [11] Kittur, Harish M. "Content Addressable Memory—Early Predict and Terminate Precharge of Match-Line." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 1, 385-387, (2017).
  • [12] Jothi, D., and R. Sivakumar. "Design and Analysis of Power Efficient Binary Content Addressable Memory (PEBCAM) Core Cells." Circuits, Systems, and Signal Processing, 1-30, ( 2017).
  • [13] Chang, Yen-Jen, Kun-Lin Tsai, and Hsiang-Jen Tsai. "Low leakage TCAM for IP lookup using two-side self-gating." IEEE Transactions on Circuits and Systems I: Regular Papers 60, no. 6 ,1478-1486, (2013).
  • [14] Zackriya, Mohammed V., and Harish M. Kittur. "Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments." Journal of Circuits, Systems and Computers 25, no. 02 ,1650002, (2016).
  • [15] Zackriya V, Mohammed, and Harish M. Kittur. "Selective match-line energizer content addressable memory (SMLE-CAM)." arXiv preprint arXiv:1406.7662 (2014).
  • [16] Kayal, D., A. Dandapat, and C. K. Sarkar. "Design of a high performance memory using a novel architecture of double bit CAM and SRAM." International Journal of Electronics 99, no. 12, 1691-1702, (2012).
  • [17] Kittur, Harish M. "Precharge-Free, Low-Power Content-Addressable Memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24, no. 8, 2614-2621, (2016).
  • [18] Mahendra, Telajala Venkata, Sandeep Mishra, and Anup Dandapat. "Self-Controlled High-Performance Precharge-Free Content-Addressable Memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 8 (2017).

Design of TCAM Architecture for Low Power and High Performance Applications

Year 2019, Volume: 32 Issue: 1, 164 - 173, 01.03.2019

Abstract

Content
Addressable Memory (CAM) is a special

memory used in search engines for numerous applications, especially in network
routers for packet forwarding.
The CAM
operation begins with pre-charging followed by evaluating the match-lines (MLs)
for searching the data in the stored memory. CAM stores unique words in their
array of cells such that only one word
is
matched
for a given search word. ML associated with matched word retains
its state and the remaining MLs drain their charge. Ternary content addressable
memory (TCAM) is a fast lookup hardware device used for high-speed packet
forwarding. However,
significant power
consumption and high cost limits its versatility and popularity. In this paper,
a design has
been made for TCAM
architecture with pre-charge controller. The pre-charge controller helps in
predicting the mismatched MLs during pre-charge phase. This prediction happens
at an early stage and helps in terminating the pre-charging of the line. This
assures the design of TCAM which consumes low
power and also improves the performance. The proposed early predict
 8 × 8 TCAM architecture simulations were
performed in 45nm technology node using Cadence Virtuoso. The proposed TCAM
design exhibits 16.6% reduction in power, 24.7% decrement in delay and 37.1%
minimization in energy metric than basic TCAM NOR.
 

References

  • [1] Mohammad, Khader, Aziz Qaroush, Mahdi Washha, and Baker Mohammad. "Low-power content addressable memory (CAM) array for mobile devices." Microelectronics Journal 67, 10-18, (2017).
  • [2] Maurya, Satendra Kumar, and Lawrence T. Clark. "A dynamic longest prefix matching content addressable memory for IP routing." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19, no. 6 963-972, (2011).
  • [3] Lines, Valerie, Abdullah Ahmed, Peter Ma, Stanley Ma, Robert McKenzie, Hong-Seok Kim, and Cynthia Mar. "66 MHz 2.3 M ternary dynamic content addressable memory." In Memory Technology, Design and Testing, 2000. Records of the 2000 IEEE International Workshop on, pp. 101-105. IEEE, (2000).
  • [4] Shin, Yong-Chul, Ramalingam Sridhar, Victor Demjanenko, Paul W. Palumbo, and Sargur N. Srihari. "A special-purpose content addressable memory chip for real-time image processing." IEEE Journal of Solid-State Circuits 27, no. 5 , 737-744, (1992).
  • [5] Bremler-Barr, Anat, and Danny Hendler. "Space-efficient TCAM-based classification using gray coding." IEEE Transactions on Computers 61, no. 1, 18-30, (2012).
  • [6] Pagiamtzis, Kostas, and Ali Sheikholeslami. "Content-addressable memory (CAM) circuits and architectures: A tutorial and survey." IEEE Journal of Solid-State Circuits 41, no. 3, 712-727, (2006).
  • [7] Schultz, Kenneth J. "Content-addressable memory core cells A survey." INTEGRATION, the VLSI journal 23, no. 2 ,171-188, (1997).
  • [8] Ruan, Shanq-Jang, Chi-Yu Wu, and Jui-Yuan Hsieh. "Low power design of precomputation-based content-addressable memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 3 , 331-335, (2008).
  • [9] Chang, Yen-Jen, and Yuan-Hong Liao. "Hybrid-type CAM design for both power and performance efficiency." IEEE transactions on very large scale integration (VLSI) systems16, no. 8, 965-974, (2008).
  • [10] Chang, Yen-Jen, and Tung-Chi Wu. "Master–Slave Match Line design for low-power content-addressable memory." IEEE transactions on very large scale integration (vlsi) systems 23, no. 9, 1740-1749, (2015).
  • [11] Kittur, Harish M. "Content Addressable Memory—Early Predict and Terminate Precharge of Match-Line." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 1, 385-387, (2017).
  • [12] Jothi, D., and R. Sivakumar. "Design and Analysis of Power Efficient Binary Content Addressable Memory (PEBCAM) Core Cells." Circuits, Systems, and Signal Processing, 1-30, ( 2017).
  • [13] Chang, Yen-Jen, Kun-Lin Tsai, and Hsiang-Jen Tsai. "Low leakage TCAM for IP lookup using two-side self-gating." IEEE Transactions on Circuits and Systems I: Regular Papers 60, no. 6 ,1478-1486, (2013).
  • [14] Zackriya, Mohammed V., and Harish M. Kittur. "Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments." Journal of Circuits, Systems and Computers 25, no. 02 ,1650002, (2016).
  • [15] Zackriya V, Mohammed, and Harish M. Kittur. "Selective match-line energizer content addressable memory (SMLE-CAM)." arXiv preprint arXiv:1406.7662 (2014).
  • [16] Kayal, D., A. Dandapat, and C. K. Sarkar. "Design of a high performance memory using a novel architecture of double bit CAM and SRAM." International Journal of Electronics 99, no. 12, 1691-1702, (2012).
  • [17] Kittur, Harish M. "Precharge-Free, Low-Power Content-Addressable Memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24, no. 8, 2614-2621, (2016).
  • [18] Mahendra, Telajala Venkata, Sandeep Mishra, and Anup Dandapat. "Self-Controlled High-Performance Precharge-Free Content-Addressable Memory." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 8 (2017).
There are 18 citations in total.

Details

Primary Language English
Subjects Engineering
Journal Section Electrical & Electronics Engineering
Authors

Satti V V Satyanarayana

Sriadibhatla Srıdevı

Publication Date March 1, 2019
Published in Issue Year 2019 Volume: 32 Issue: 1

Cite

APA V V Satyanarayana, S., & Srıdevı, S. (2019). Design of TCAM Architecture for Low Power and High Performance Applications. Gazi University Journal of Science, 32(1), 164-173.
AMA V V Satyanarayana S, Srıdevı S. Design of TCAM Architecture for Low Power and High Performance Applications. Gazi University Journal of Science. March 2019;32(1):164-173.
Chicago V V Satyanarayana, Satti, and Sriadibhatla Srıdevı. “Design of TCAM Architecture for Low Power and High Performance Applications”. Gazi University Journal of Science 32, no. 1 (March 2019): 164-73.
EndNote V V Satyanarayana S, Srıdevı S (March 1, 2019) Design of TCAM Architecture for Low Power and High Performance Applications. Gazi University Journal of Science 32 1 164–173.
IEEE S. V V Satyanarayana and S. Srıdevı, “Design of TCAM Architecture for Low Power and High Performance Applications”, Gazi University Journal of Science, vol. 32, no. 1, pp. 164–173, 2019.
ISNAD V V Satyanarayana, Satti - Srıdevı, Sriadibhatla. “Design of TCAM Architecture for Low Power and High Performance Applications”. Gazi University Journal of Science 32/1 (March 2019), 164-173.
JAMA V V Satyanarayana S, Srıdevı S. Design of TCAM Architecture for Low Power and High Performance Applications. Gazi University Journal of Science. 2019;32:164–173.
MLA V V Satyanarayana, Satti and Sriadibhatla Srıdevı. “Design of TCAM Architecture for Low Power and High Performance Applications”. Gazi University Journal of Science, vol. 32, no. 1, 2019, pp. 164-73.
Vancouver V V Satyanarayana S, Srıdevı S. Design of TCAM Architecture for Low Power and High Performance Applications. Gazi University Journal of Science. 2019;32(1):164-73.