MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN
Abstract
Keywords
References
- P. Mandal, and V. Visvanathan, “CMOS Op-AMP Sizing Using a Geometric Programming Formulation”, IEEE Trans. CAD, vol. 20, pp. 22-38 Jan, 2001.
- M. Hershenson, S. Boyd, and T. H. Lee, “Optimal Design of a CMOS Op-amp via Geometric Programming”, IEEE Trans. CAD, vol. 20, pp.1-21, Jan, 2001.
- S. Maji, and P. Mandal, “A Fast Equation Free Iterative Approach to Analog Circuit Sizing”, VLSID, 2012.
- B. Antao, G. Gielen, and R. Rutenbar, “DARWIN: CMOS opamp synthesis by means of a genetic algorithm”, DAC, 1995.
- V. Aggarwal, and U. -M. O’Reilly, “Simulation-based Reusable posynomial models for MOS transistor parameters”, DATE, 2007.
- A. Magnani, and S. Boyd, “Convex piecewise-linear fitting”, J. Optimization and Engineering, 2006.
- J. Kim, J. Lee, L. Vandenberghe, and C. -K. K. Yang, “Techniques for improving the accuracy of geometric-programming based analog circuit design optimization”, ICCAD, 2004.
- S. DasGupta, and P. Mandal, “An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Submicron Technology”, VLSID, 2010.
Details
Primary Language
English
Subjects
-
Journal Section
Research Article
Authors
Deniz Özenli
İSTANBUL TEKNİK ÜNİVERSİTESİ
Türkiye
Hakan Kuntman
İSTANBUL TEKNİK ÜNİVERSİTESİ
Türkiye
Publication Date
July 27, 2017
Submission Date
March 16, 2017
Acceptance Date
-
Published in Issue
Year 2017 Volume: 17 Number: 2