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MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN

Year 2017, Volume: 17 Issue: 2, 3361 - 3367, 27.07.2017

Abstract

In
this work, a systematic of the automation in the result of the re-obtained
small signal parameters based on SPICE and CADENCE-SPECTRE is presented for
MOS-Only circuits. Accuracy of the re-obtained parameters was improved by
re-formulating in the basis of SPICE and CADENCE-SPECTRE. Moreover, piece-wise
polynomial regressive models are presented for gm
 ,gds  and Ids . Also, performance
of the models is compared with conventional expressions. Success of the given
MOS-Only design automation based on re-obtained small signal parameters is
verified with an exemplary new agile filter.
 

References

  • P. Mandal, and V. Visvanathan, “CMOS Op-AMP Sizing Using a Geometric Programming Formulation”, IEEE Trans. CAD, vol. 20, pp. 22-38 Jan, 2001.
  • M. Hershenson, S. Boyd, and T. H. Lee, “Optimal Design of a CMOS Op-amp via Geometric Programming”, IEEE Trans. CAD, vol. 20, pp.1-21, Jan, 2001.
  • S. Maji, and P. Mandal, “A Fast Equation Free Iterative Approach to Analog Circuit Sizing”, VLSID, 2012.
  • B. Antao, G. Gielen, and R. Rutenbar, “DARWIN: CMOS opamp synthesis by means of a genetic algorithm”, DAC, 1995.
  • V. Aggarwal, and U. -M. O’Reilly, “Simulation-based Reusable posynomial models for MOS transistor parameters”, DATE, 2007.
  • A. Magnani, and S. Boyd, “Convex piecewise-linear fitting”, J. Optimization and Engineering, 2006.
  • J. Kim, J. Lee, L. Vandenberghe, and C. -K. K. Yang, “Techniques for improving the accuracy of geometric-programming based analog circuit design optimization”, ICCAD, 2004.
  • S. DasGupta, and P. Mandal, “An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Submicron Technology”, VLSID, 2010.
  • Maji, Supriyo, and Pradip Mandal. “Effcient approaches to overcome non-convexity issues in analog design automation.” Quality Electronic Design (ISQED), 2012 13th International Symposium on. IEEE, 2012.
  • W. Daems, G. Gielen, and W. Sansen, “Simulation-Based Generation of Posynomial Performance Models for the Sizing of Analog Integrated Circuits”, IEEE Trans. CAD, vol. 22, pp. 517-534, May, 2003.
  • T. Eeckelaert, W. Daems, G. Gielen, and W. Sansen, “Generalized Posynomial Performance Modeling”, DATE, 2003.
  • W. Daems, G. Gielen, and W. Sansen, “Simulation-based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing”, ICCAD, 2001.
  • Özenli, D. and Kuntman, H. H. “MOS-only circuit design automation”, IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) , pp. 203-206. IEEE, 2016.
  • Ozenli, Deniz, and Hakan Kuntman. "MOS-only design automation and a simple agile MOS-only BP/LP filter design." Electrical, Electronics and Biomedical Engineering (ELECO), 2016 National Conference on. IEEE, 2016.
  • Y. Lakys and A. Fabre, “Multistandard transceivers: state of the art and a new versatile implementation for fully active frequency agile filters”, Analog Integrated Circuits and Signal Processing, Volume 74, Issue 1, pp 63-78, January 2013.
  • Alaybeyoglu, E. and Kuntman, H, "A new VDTA based frequency agile filter," in Electrical and Electronics Engineering (ELECO), 2015 9th International Conference on, vol., no., pp.42-45, 26-28 Nov. 2015.
  • Alaybeyoğlu, Ersin, and Hakan Kuntman. "CMOS implementations of VDTA based frequency agile filters for encrypted communications." Analog Integrated Circuits and Signal Processing 89.3, pp. 675-684, 2016.
  • Pandey, N.; Pandey, R.; Choudhary, R.; Sayal, A.; Tripathi, M., "Realization of CDTA based frequency agile filter," Signal Processing, Computing and Control (ISPCC), 2013 IEEE International Conference on , vol., no., pp.1,6, 26-28 Sept. 2013.
  • Alaybeyoglu, E, Atasoyu M and Kuntman H. "Frequency agile filter structure improved by MOS-only technique." Telecommunications and Signal Processing (TSP), 38th International Conference on. IEEE, 2015.
  • Arslan, Emre, et al. "MOS-only second order current-mode LP/BP filter." Analog Integrated Circuits and Signal Processing 74.1, pp. 105-109, 2013.
Year 2017, Volume: 17 Issue: 2, 3361 - 3367, 27.07.2017

Abstract

References

  • P. Mandal, and V. Visvanathan, “CMOS Op-AMP Sizing Using a Geometric Programming Formulation”, IEEE Trans. CAD, vol. 20, pp. 22-38 Jan, 2001.
  • M. Hershenson, S. Boyd, and T. H. Lee, “Optimal Design of a CMOS Op-amp via Geometric Programming”, IEEE Trans. CAD, vol. 20, pp.1-21, Jan, 2001.
  • S. Maji, and P. Mandal, “A Fast Equation Free Iterative Approach to Analog Circuit Sizing”, VLSID, 2012.
  • B. Antao, G. Gielen, and R. Rutenbar, “DARWIN: CMOS opamp synthesis by means of a genetic algorithm”, DAC, 1995.
  • V. Aggarwal, and U. -M. O’Reilly, “Simulation-based Reusable posynomial models for MOS transistor parameters”, DATE, 2007.
  • A. Magnani, and S. Boyd, “Convex piecewise-linear fitting”, J. Optimization and Engineering, 2006.
  • J. Kim, J. Lee, L. Vandenberghe, and C. -K. K. Yang, “Techniques for improving the accuracy of geometric-programming based analog circuit design optimization”, ICCAD, 2004.
  • S. DasGupta, and P. Mandal, “An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Submicron Technology”, VLSID, 2010.
  • Maji, Supriyo, and Pradip Mandal. “Effcient approaches to overcome non-convexity issues in analog design automation.” Quality Electronic Design (ISQED), 2012 13th International Symposium on. IEEE, 2012.
  • W. Daems, G. Gielen, and W. Sansen, “Simulation-Based Generation of Posynomial Performance Models for the Sizing of Analog Integrated Circuits”, IEEE Trans. CAD, vol. 22, pp. 517-534, May, 2003.
  • T. Eeckelaert, W. Daems, G. Gielen, and W. Sansen, “Generalized Posynomial Performance Modeling”, DATE, 2003.
  • W. Daems, G. Gielen, and W. Sansen, “Simulation-based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing”, ICCAD, 2001.
  • Özenli, D. and Kuntman, H. H. “MOS-only circuit design automation”, IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) , pp. 203-206. IEEE, 2016.
  • Ozenli, Deniz, and Hakan Kuntman. "MOS-only design automation and a simple agile MOS-only BP/LP filter design." Electrical, Electronics and Biomedical Engineering (ELECO), 2016 National Conference on. IEEE, 2016.
  • Y. Lakys and A. Fabre, “Multistandard transceivers: state of the art and a new versatile implementation for fully active frequency agile filters”, Analog Integrated Circuits and Signal Processing, Volume 74, Issue 1, pp 63-78, January 2013.
  • Alaybeyoglu, E. and Kuntman, H, "A new VDTA based frequency agile filter," in Electrical and Electronics Engineering (ELECO), 2015 9th International Conference on, vol., no., pp.42-45, 26-28 Nov. 2015.
  • Alaybeyoğlu, Ersin, and Hakan Kuntman. "CMOS implementations of VDTA based frequency agile filters for encrypted communications." Analog Integrated Circuits and Signal Processing 89.3, pp. 675-684, 2016.
  • Pandey, N.; Pandey, R.; Choudhary, R.; Sayal, A.; Tripathi, M., "Realization of CDTA based frequency agile filter," Signal Processing, Computing and Control (ISPCC), 2013 IEEE International Conference on , vol., no., pp.1,6, 26-28 Sept. 2013.
  • Alaybeyoglu, E, Atasoyu M and Kuntman H. "Frequency agile filter structure improved by MOS-only technique." Telecommunications and Signal Processing (TSP), 38th International Conference on. IEEE, 2015.
  • Arslan, Emre, et al. "MOS-only second order current-mode LP/BP filter." Analog Integrated Circuits and Signal Processing 74.1, pp. 105-109, 2013.
There are 20 citations in total.

Details

Journal Section Articles
Authors

Deniz Özenli

Hakan Kuntman

Publication Date July 27, 2017
Published in Issue Year 2017 Volume: 17 Issue: 2

Cite

APA Özenli, D., & Kuntman, H. (2017). MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN. IU-Journal of Electrical & Electronics Engineering, 17(2), 3361-3367.
AMA Özenli D, Kuntman H. MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN. IU-Journal of Electrical & Electronics Engineering. July 2017;17(2):3361-3367.
Chicago Özenli, Deniz, and Hakan Kuntman. “MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN”. IU-Journal of Electrical & Electronics Engineering 17, no. 2 (July 2017): 3361-67.
EndNote Özenli D, Kuntman H (July 1, 2017) MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN. IU-Journal of Electrical & Electronics Engineering 17 2 3361–3367.
IEEE D. Özenli and H. Kuntman, “MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN”, IU-Journal of Electrical & Electronics Engineering, vol. 17, no. 2, pp. 3361–3367, 2017.
ISNAD Özenli, Deniz - Kuntman, Hakan. “MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN”. IU-Journal of Electrical & Electronics Engineering 17/2 (July 2017), 3361-3367.
JAMA Özenli D, Kuntman H. MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN. IU-Journal of Electrical & Electronics Engineering. 2017;17:3361–3367.
MLA Özenli, Deniz and Hakan Kuntman. “MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN”. IU-Journal of Electrical & Electronics Engineering, vol. 17, no. 2, 2017, pp. 3361-7.
Vancouver Özenli D, Kuntman H. MOS-ONLY AUTOMATION TECHNIQUE WITH AN EXEMPLARY MOS-ONLY BP/LP AGILE FILTER DESIGN. IU-Journal of Electrical & Electronics Engineering. 2017;17(2):3361-7.