Araştırma Makalesi
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Formel Yaklaşımlar ile Sürüm Değerlendirme

Yıl 2021, Cilt: 5 Sayı: 1, 129 - 140, 29.06.2021

Öz

Bu çalışmada sürüm değerlendirme sürecini otomatikleştirmek için formel metotlar kullanılarak bir yöntem geliştirilmiştir. Sürüm değerlendirme sürecinde, bir sunucunun yeni ve eski sürümleri benzer (veya aynı) konfigürasyonlarda çalıştırılır ve sistemlerin ürettikleri izler karşılaştırılır. Bu karşılaştırma grafik incelenmesi, izlerin sabit ölçütler ile karşılaştırılması veya regresyon analizi tabanlı olabilir. Bu makalede ise, yapılan önceki çalışmalardan farklı olarak formel metotlar tabanlı bir analiz yöntemi sunulmaktadır. Bu yöntem karşılaştırılacak sistemlerden verilerin toplanması, her iki veri kümesi için bu kümeleri tanımlayacak Sinyal Zamansal Mantık (STL) formüllerinin üretilmesi ve son olarak da yüksek başarım ile kümeleri tanımlayabilen aynı yapıya sahip formüllerin karşılaştırılması ile sürüm değerlendirme sonucunun üretilmesi adımlarından oluşmaktadır. Bu yöntem ile sürüm değerlendirmede kullanılmak üzere, ölçütlerin STL formülü olarak ifade edilmesi ve bu ölçütlerin sistem izlerinden otomatik olarak üretilmesi sağlanmıştır. Zamansal mantıkların konuşma diline benzerlikleri sayesinde bu formüller açıklayıcıdır. Geliştirilen metot ile değerlendirme süreci otomatikleştirilmektedir. Elde edilen sonuçlar örnek veri kümeleri üzerinde incelenmiştir.

Destekleyen Kurum

TÜBİTAK

Proje Numarası

117E242

Kaynakça

  • Asarin E., Donzé A., Maler O. & Nickovic D. (2012). Parametric Identification of Temporal Properties. In: Khurshid S., Sen K. (eds). Lecture Notes in Computer Science, vol 7186: Proceedings of Runtime Verification (pp. 147-160). Springer, Berlin, Heidelberg. https://doi.org /10.1007/978-3- 642-29860 -8_12.
  • Aydin, S. K. & Aydin Gol, E. (2020). Synthesis of monitoring rules with STL. Journal of Circuits, Systems, and Computers, 29(11), 1-26. https://doi.org/10.1142/S0218126620501777.
  • Bartocci E., Bortolussi L. & Sanguinetti G. (2014) Data-Driven statistical learning of temporal logic properties. In: Legay A., Bozga M. (eds). Lecture Notes in Computer Science, vol 8711: Proceedings of Formal Modeling and Analysis of Timed Systems (pp 23-37). Springer, Cham. https://doi.org /10.1007/978-3-319-10512-3_3.
  • Bays, M. E. (1999). Software Release Methodology. USA: Prentice-Hall.
  • Bombara, G., Vasile, C.-I., Penedo, F., Yasuoka, H. & Belta, C. (2016). A decision tree approach to data classification using signal temporal logic. Proceedings of the Hybrid Systems: Computation and Control, 1–10. https://doi.org/10.1145/2883817.2883843.
  • Chatterjee, S. & Simonoff, J. S. (2013). Handbook of Regression Analysis. Wiley.
  • Donzé A. (2013). On signal temporal logic. In: Legay A., Bensalem S. (eds). Lecture Notes in Computer Science, vol 8174: Proceedings of Runtime Verification (pp 382-383). Berlin: Springer. https://doi.org/10.1007/978-3-642-40787-1_27.
  • Ergurtuna, M. & Aydin Gol E. (2019). An efficient formula synthesis method with past signal temporal logic. Proceedings of the IFAC Conference on Intelligent Control and Automation Sciences (ICONS), 43-48. https://doi.org/10.1016/j.ifacol.2019.09.116.
  • Gabbay D. (1989) The declarative past and imperative future. In: Banieqbal B., Barringer H., Pnueli A. (eds) Temporal Logic in Specification. Lecture Notes in Computer Science, vol 398 (pp. 409-448). Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-51803-7_36.
  • Howard, D. (2016). IT Release Management. O’Reilly.
  • Hoxha, B., Dokhanchi, A. & Fainekos, G. (2018). Mining parametric temporal logic properties in model-based design for cyber-physical systems.Int J Softw Tools Technol Transfer20,79–93. https://doi.org/10.1007/s10009-017-0447-4 .
  • Jha, S., Tiwari, A., Seshia, S.A., Sahai, T. & Shankar, N. (2019). TeLEx: learning signal temporal logic from positive examples using tightness metric.Formal Methods in System Design54.364–387. https://doi.org/10.1007/s10703-019-00332-1.
  • Jin, X., Donzé, A., Deshmukh, J. V. & Seshia, S. A. (2015). Mining requirements from closed-loop control models. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34, 11. 1704-1717. https://doi.org/10.1109/TCAD.2015.2421907.
  • Ketenci, A. & Aydin Gol, E. (2019). Synthesis of monitoring rules via data mining. Proceedings of the IEEE American Control Conference (ACC), 1684-1689. https://doi.org/10.23919/ACC.2019.8815002.
  • Kong, Z., Jones, A., Ayala, A. M., Aydin Gol, E. & Belta, C. (2014). Temporal logic inference for classification and prediction from data. Proceedings of the Hybrid Systems: Computation and Control, 273–282. https://doi.org/10.1145/2562059.2562146.
  • Mohammadinejad, S., Deshmukh, J. V., Puranic, A. G., Vazquez-Chanlatte, M. & Donzé, A. (2020). Interpretable classification of time-series data using efficient enumerative techniques. Proceedings of the Hybrid Systems: Computation and Control, 1–10. https://doi.org/10.1145/3365365.3382218.
  • Sommerville, I. (2015). Software Engineering (10th ed.). Pearson.
  • Yoo, C & Belta, C. (2017). Rich time series classification using temporal logic. Proceedings of Robotic: Science and Systems. 1-9.

A Formal Methods Approach for Release Evaluation

Yıl 2021, Cilt: 5 Sayı: 1, 129 - 140, 29.06.2021

Öz

In this paper, a formal method-based release evaluation method was developed. During the release evaluation process, two versions of a server are run under similar (or the same) configurations and the system logs are compared. This comparison can be based on graphical analysis, applying fixed rules over logs or regression analysis. This paper presents a novel release evaluation approach based on formal methods. The proposed method consists of three main steps. The first step is the collection of data from both versions of the server. The second step is the synthesis of Signal Temporal Logic (STL) formulas for each dataset. The final step is the generation of the release evaluation result by comparing the formulas that have the same structure and that can represent both datasets with high accuracy. Thus, the proposed approach represents the release evaluation rules as STL formulas and generates such formulas from system logs in an automated way. Due to the resemblance of temporal logics to natural language, the resulting formulas explain the evaluation result. The proposed method automates the release evaluation process. The findings of the paper are shown over sample datasets. 

Proje Numarası

117E242

Kaynakça

  • Asarin E., Donzé A., Maler O. & Nickovic D. (2012). Parametric Identification of Temporal Properties. In: Khurshid S., Sen K. (eds). Lecture Notes in Computer Science, vol 7186: Proceedings of Runtime Verification (pp. 147-160). Springer, Berlin, Heidelberg. https://doi.org /10.1007/978-3- 642-29860 -8_12.
  • Aydin, S. K. & Aydin Gol, E. (2020). Synthesis of monitoring rules with STL. Journal of Circuits, Systems, and Computers, 29(11), 1-26. https://doi.org/10.1142/S0218126620501777.
  • Bartocci E., Bortolussi L. & Sanguinetti G. (2014) Data-Driven statistical learning of temporal logic properties. In: Legay A., Bozga M. (eds). Lecture Notes in Computer Science, vol 8711: Proceedings of Formal Modeling and Analysis of Timed Systems (pp 23-37). Springer, Cham. https://doi.org /10.1007/978-3-319-10512-3_3.
  • Bays, M. E. (1999). Software Release Methodology. USA: Prentice-Hall.
  • Bombara, G., Vasile, C.-I., Penedo, F., Yasuoka, H. & Belta, C. (2016). A decision tree approach to data classification using signal temporal logic. Proceedings of the Hybrid Systems: Computation and Control, 1–10. https://doi.org/10.1145/2883817.2883843.
  • Chatterjee, S. & Simonoff, J. S. (2013). Handbook of Regression Analysis. Wiley.
  • Donzé A. (2013). On signal temporal logic. In: Legay A., Bensalem S. (eds). Lecture Notes in Computer Science, vol 8174: Proceedings of Runtime Verification (pp 382-383). Berlin: Springer. https://doi.org/10.1007/978-3-642-40787-1_27.
  • Ergurtuna, M. & Aydin Gol E. (2019). An efficient formula synthesis method with past signal temporal logic. Proceedings of the IFAC Conference on Intelligent Control and Automation Sciences (ICONS), 43-48. https://doi.org/10.1016/j.ifacol.2019.09.116.
  • Gabbay D. (1989) The declarative past and imperative future. In: Banieqbal B., Barringer H., Pnueli A. (eds) Temporal Logic in Specification. Lecture Notes in Computer Science, vol 398 (pp. 409-448). Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-51803-7_36.
  • Howard, D. (2016). IT Release Management. O’Reilly.
  • Hoxha, B., Dokhanchi, A. & Fainekos, G. (2018). Mining parametric temporal logic properties in model-based design for cyber-physical systems.Int J Softw Tools Technol Transfer20,79–93. https://doi.org/10.1007/s10009-017-0447-4 .
  • Jha, S., Tiwari, A., Seshia, S.A., Sahai, T. & Shankar, N. (2019). TeLEx: learning signal temporal logic from positive examples using tightness metric.Formal Methods in System Design54.364–387. https://doi.org/10.1007/s10703-019-00332-1.
  • Jin, X., Donzé, A., Deshmukh, J. V. & Seshia, S. A. (2015). Mining requirements from closed-loop control models. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34, 11. 1704-1717. https://doi.org/10.1109/TCAD.2015.2421907.
  • Ketenci, A. & Aydin Gol, E. (2019). Synthesis of monitoring rules via data mining. Proceedings of the IEEE American Control Conference (ACC), 1684-1689. https://doi.org/10.23919/ACC.2019.8815002.
  • Kong, Z., Jones, A., Ayala, A. M., Aydin Gol, E. & Belta, C. (2014). Temporal logic inference for classification and prediction from data. Proceedings of the Hybrid Systems: Computation and Control, 273–282. https://doi.org/10.1145/2562059.2562146.
  • Mohammadinejad, S., Deshmukh, J. V., Puranic, A. G., Vazquez-Chanlatte, M. & Donzé, A. (2020). Interpretable classification of time-series data using efficient enumerative techniques. Proceedings of the Hybrid Systems: Computation and Control, 1–10. https://doi.org/10.1145/3365365.3382218.
  • Sommerville, I. (2015). Software Engineering (10th ed.). Pearson.
  • Yoo, C & Belta, C. (2017). Rich time series classification using temporal logic. Proceedings of Robotic: Science and Systems. 1-9.
Toplam 18 adet kaynakça vardır.

Ayrıntılar

Birincil Dil Türkçe
Konular Bilgisayar Yazılımı
Bölüm Araştırma Makalesi
Yazarlar

Ebru Aydın Göl 0000-0002-5813-9836

Proje Numarası 117E242
Yayımlanma Tarihi 29 Haziran 2021
Gönderilme Tarihi 12 Şubat 2021
Yayımlandığı Sayı Yıl 2021 Cilt: 5 Sayı: 1

Kaynak Göster

APA Aydın Göl, E. (2021). Formel Yaklaşımlar ile Sürüm Değerlendirme. Acta Infologica, 5(1), 129-140.
AMA Aydın Göl E. Formel Yaklaşımlar ile Sürüm Değerlendirme. ACIN. Haziran 2021;5(1):129-140.
Chicago Aydın Göl, Ebru. “Formel Yaklaşımlar Ile Sürüm Değerlendirme”. Acta Infologica 5, sy. 1 (Haziran 2021): 129-40.
EndNote Aydın Göl E (01 Haziran 2021) Formel Yaklaşımlar ile Sürüm Değerlendirme. Acta Infologica 5 1 129–140.
IEEE E. Aydın Göl, “Formel Yaklaşımlar ile Sürüm Değerlendirme”, ACIN, c. 5, sy. 1, ss. 129–140, 2021.
ISNAD Aydın Göl, Ebru. “Formel Yaklaşımlar Ile Sürüm Değerlendirme”. Acta Infologica 5/1 (Haziran 2021), 129-140.
JAMA Aydın Göl E. Formel Yaklaşımlar ile Sürüm Değerlendirme. ACIN. 2021;5:129–140.
MLA Aydın Göl, Ebru. “Formel Yaklaşımlar Ile Sürüm Değerlendirme”. Acta Infologica, c. 5, sy. 1, 2021, ss. 129-40.
Vancouver Aydın Göl E. Formel Yaklaşımlar ile Sürüm Değerlendirme. ACIN. 2021;5(1):129-40.