Research Article

Assembler Design for BZK.SAU.FPGA Micro Computer Architecture

Volume: 13 Number: 1 July 14, 2017
EN TR

Assembler Design for BZK.SAU.FPGA Micro Computer Architecture

Abstract

It is necessary to constitute a memory organization and a memory map in the microcomputer architecture in order to allow operation systems and assembler to work. The BZK.SAU.FPGA microcomputer architecture assembler instruction set consists of 59 instructions and uses 6 different addressing modes. This work demonstrates how to design an assembly language from scratch on the BZK.SAU.FPGA microcomputer architecture. The assembler program uses the Brute-force Search Algorithm to convert the user source program to machine code.

Keywords

References

  1. 1. GARCIA, M.I., Rodriguez, S., Perez, A., Garcia, A., p88110: A Graphical Simulator for Computer Architecture and Organization Courses, IEEE Transactions on Education, 52, 2, 248–256, (2009).
  2. 2. NIKOLIC, Z., Radivojevic, J., Djordjevic, J., Milutinovic, V., A Survey and Evaluation of Simulators Suitable for Teaching Courses in Computer Architecture and Organization, IEEE Transactions on Education, 52, 4, 449–458, (2009).
  3. 3. STOJKOVIC, A., Djordjevic, J., Nikolic, B., WASP: A Web Based Educational System for Teaching Computer Architecture and Organization, International Journal Electrical Engineering Education, 44, 3, 197–215, (2007).
  4. 4. DJORDJEVIC, J., Nikolic, B., Milenkovic, A., Flexible Web-based Educational System for Teaching Computer Architecture and Organization, IEEE Transactions on Education, 48, 2, 264–273, (2005).
  5. 5. QINGQIANG, W., Langcai, C., Teaching Mode of Operating System Course for Undergraduates Majoring in Computer Sciences, 4th International Conference on Computer Science & Education, Xiamen- China, (2009) pp: 1412-1415.
  6. 6. The Joint Task Force on Computing Curricula, IEEE Computer Society and Association for Computing Machinery, Computin Curricula, (2001).
  7. 7. ÖZTEKİN, H., Eğitim Amaçlı Yapılandırılabilir Modüler Donanım Üzerine Gömülü İşletim Sistemi Tasarımı, (Doktora Tezi), Sakarya Üniversitesi Fen Bilimleri Enstitüsü, (2012).
  8. 8. Proje Raporu: Proje No: 110E069 Proje Adı: Uzaktan Erişilebilir Yapılandırılabilir Donanım Üzerine Eğitim Amaçlı Mikro Bilgisayar Mimarisi ve Gömülü İşletim Sistemi Tasarımı (2012).

Details

Primary Language

English

Subjects

-

Journal Section

Research Article

Authors

Halit Öztekin
BOZOK ÜNİVERSİTESİ
Türkiye

Ali Gülbağ
SAKARYA ÜNİVERSİTESİ
Türkiye

Feyzullah Temurtaş
BOZOK ÜNİVERSİTESİ

Publication Date

July 14, 2017

Submission Date

June 12, 2017

Acceptance Date

June 12, 2017

Published in Issue

Year 2017 Volume: 13 Number: 1

APA
Öztekin, H., Gülbağ, A., & Temurtaş, F. (2017). Assembler Design for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering, 13(1), 1-9. https://izlik.org/JA84UP59JR
AMA
1.Öztekin H, Gülbağ A, Temurtaş F. Assembler Design for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering. 2017;13(1):1-9. https://izlik.org/JA84UP59JR
Chicago
Öztekin, Halit, Ali Gülbağ, and Feyzullah Temurtaş. 2017. “Assembler Design for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering 13 (1): 1-9. https://izlik.org/JA84UP59JR.
EndNote
Öztekin H, Gülbağ A, Temurtaş F (July 1, 2017) Assembler Design for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering 13 1 1–9.
IEEE
[1]H. Öztekin, A. Gülbağ, and F. Temurtaş, “Assembler Design for BZK.SAU.FPGA Micro Computer Architecture”, Electronic Letters on Science and Engineering, vol. 13, no. 1, pp. 1–9, July 2017, [Online]. Available: https://izlik.org/JA84UP59JR
ISNAD
Öztekin, Halit - Gülbağ, Ali - Temurtaş, Feyzullah. “Assembler Design for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering 13/1 (July 1, 2017): 1-9. https://izlik.org/JA84UP59JR.
JAMA
1.Öztekin H, Gülbağ A, Temurtaş F. Assembler Design for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering. 2017;13:1–9.
MLA
Öztekin, Halit, et al. “Assembler Design for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering, vol. 13, no. 1, July 2017, pp. 1-9, https://izlik.org/JA84UP59JR.
Vancouver
1.Halit Öztekin, Ali Gülbağ, Feyzullah Temurtaş. Assembler Design for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering [Internet]. 2017 Jul. 1;13(1):1-9. Available from: https://izlik.org/JA84UP59JR