Temperature-Aware X-filling for Very Large Scale Integrated Circuits
Abstract
The
excess switching activity during testing increases the power dissipation beyond
the normal operation of the circuit. The non-linear power distribution creates
localized heating called hotspot which results in the structural damage and
increased cooling package cost. The temperature of a particular block depends
on heat generation and dissipation of the circuit blocks. The uniformity in
power distribution among the circuit blocks is the key requirement for
temperature reduction. The unspecified bits present in the test patterns are utilized
to reduce the switching activity during testing. In this paper, we present an
event-driven based power analysis and temperature aware X-filling to reduce the
total power dissipation among the circuit blocks in such a way to reduce peak
temperature. To reduce the peak temperature, the power dissipation of each
block is monitored with the help of fillings the X-bits. The experiments are
carried out with the ISCAS’89 benchmark circuit and show a significant
reduction in peak temperature and ensure uniform power distribution during
testing.
Keywords
References
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Details
Primary Language
English
Subjects
Engineering
Journal Section
Research Article
Publication Date
June 1, 2019
Submission Date
June 5, 2018
Acceptance Date
November 12, 2018
Published in Issue
Year 2019 Volume: 32 Number: 2