BibTex RIS Kaynak Göster

DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs

Yıl 2008, Cilt: 8 Sayı: 1, 519 - 527, 02.01.2012

Öz

DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs

Yıl 2008, Cilt: 8 Sayı: 1, 519 - 527, 02.01.2012

Öz

Toplam 0 adet kaynakça vardır.

Ayrıntılar

Birincil Dil İngilizce
Bölüm Makaleler
Yazarlar

Yang Kaı Bu kişi benim

GU Cheng-lın Bu kişi benim

Yayımlanma Tarihi 2 Ocak 2012
Yayımlandığı Sayı Yıl 2008 Cilt: 8 Sayı: 1

Kaynak Göster

APA Kaı, Y., & Cheng-lın, G. (2012). DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs. IU-Journal of Electrical & Electronics Engineering, 8(1), 519-527.
AMA Kaı Y, Cheng-lın G. DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs. IU-Journal of Electrical & Electronics Engineering. Ocak 2012;8(1):519-527.
Chicago Kaı, Yang, ve GU Cheng-lın. “DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs”. IU-Journal of Electrical & Electronics Engineering 8, sy. 1 (Ocak 2012): 519-27.
EndNote Kaı Y, Cheng-lın G (01 Ocak 2012) DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs. IU-Journal of Electrical & Electronics Engineering 8 1 519–527.
IEEE Y. Kaı ve G. Cheng-lın, “DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs”, IU-Journal of Electrical & Electronics Engineering, c. 8, sy. 1, ss. 519–527, 2012.
ISNAD Kaı, Yang - Cheng-lın, GU. “DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs”. IU-Journal of Electrical & Electronics Engineering 8/1 (Ocak 2012), 519-527.
JAMA Kaı Y, Cheng-lın G. DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs. IU-Journal of Electrical & Electronics Engineering. 2012;8:519–527.
MLA Kaı, Yang ve GU Cheng-lın. “DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs”. IU-Journal of Electrical & Electronics Engineering, c. 8, sy. 1, 2012, ss. 519-27.
Vancouver Kaı Y, Cheng-lın G. DESIGN, OPTIMIZATION AND APPLICATION OF NOVEL PLANAR BENDING ESMAAs. IU-Journal of Electrical & Electronics Engineering. 2012;8(1):519-27.