Araştırma Makalesi
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Single phase inverter design based on selective harmonic elimination method

Yıl 2013, Cilt: 17 Sayı: 3, 329 - 335, 01.06.2013

Öz

Minimization of harmonic distortions in voltage source inverters’ output wave form is very important. In this paper, a single phase inverter design that can change the operating frequency between 5 Hz – 50 Hz to achieve the keeping the voltage/frequency ratio (V/f) as constant during single phase asynchronous motor driving is presented. For the aim of minimizing the voltage harmonics, pulse width modulation (PWM) based selective harmonic elimination method (SHEM) is used in the design. Via this method, 3., 5., 7., 9., 11. and 13. harmonic components of the inverter output voltage are eliminated while regulating the amplitude of the main harmonic component. A practical application circuit is installed for the proposed design. The obtained results have shown that the proposed design is efficient in reducing of harmonic distortions.

Kaynakça

  • Yalçın, F., ‘Bir Fazlı İnverter Tasarımı’, Yüksek Lisans Tezi, Sakarya Üniversitesi Fen Bilimleri Enstitüsü, Sakarya, 2009.
  • Mohan, N., Undeland, T.M., Robbins, W.P., ‘Power Electronics: Converters, Applications, and Design’, John Wiley & Sons Inc., Haboken, NJ, 1995.
  • Narimani, M., Mochopoulos, G., ‘Selective Harmonic Elimination in Three-Phase MultiModule Voltage Source Inverters’, 27 th Annual IEEE Applied Power Electronics Conference and Exposition, Orlando, 2012.
  • Shojaei, A., Fathi, S.H., ‘An Improved Selective Harmonics Elimination Method to Reduce Voltage THD in Parallel Multilevel Inverters’, International Review of Electrical Engineering, Vol. 6-7, 3196-3203, 2011.
  • Kavousi, A., Vahidi, B. Salehi, R., Bakhshizadeh, M., Farokhnia, N., Fathi, S.S., ‘Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters’, IEEE Transactions on Power Electronics, Vol. 27-4, 1689-1696, 2012.
  • Filho, F., Maia, H.Z., Mateus, T.H.A., Ozpineci, B., Tolbert, L.M., Pinto, J.O.P., ‘Adaptive Selective Harmonic Minimization Based on ANNs for Cascade Multilevel Inverters With Varying DC Sources’, IEEE Transactions on Industrial Electronics, Vol. 60-5, 1955-1962, 20
  • Arifoğlu, U., ‘Güç Sistemlerinin Bilgisayar Destekli Analizi’, Alfa Yayınları, İstanbul, 2002. http://www.mathworks.com/products/matlab/ (Erişim Tarihi: Mart 2013)
  • Xue, Y., Chang, L., Kjaer, S.B., Bordonau, J., Shimizu, T., ‘Topologies of Single-phase Inverters for Small Distributed Power Generators: An Overview’, IEEE Transactions on Power Electronics, Vol. 19-5, 1305-1314, 200

Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı

Yıl 2013, Cilt: 17 Sayı: 3, 329 - 335, 01.06.2013

Öz

Minimization of harmonic distortions in voltage source inverters' output wave form is very important. In this paper, a single phase inverter design that can change the operating frequency between 5 Hz 50 Hz to achieve the keeping the voltage/frequency ratio (V/f) as constant during single phase asynchronous motor driving is presented. For the aim of minimizing the voltage harmonics, pulse width modulation (PWM) based selective harmonic elimination method (SHEM) is used in the design. Via this method, 3., 5., 7., 9., 11. ve 13. harmonic components of the inverter output voltage are eliminated while regulating the amplitude of the main harmonic component. A practical application circuit is installed for the proposed design. The obtained results have shown that the proposed design is efficient in reducing of harmonic distortions.

Kaynakça

  • Yalçın, F., ‘Bir Fazlı İnverter Tasarımı’, Yüksek Lisans Tezi, Sakarya Üniversitesi Fen Bilimleri Enstitüsü, Sakarya, 2009.
  • Mohan, N., Undeland, T.M., Robbins, W.P., ‘Power Electronics: Converters, Applications, and Design’, John Wiley & Sons Inc., Haboken, NJ, 1995.
  • Narimani, M., Mochopoulos, G., ‘Selective Harmonic Elimination in Three-Phase MultiModule Voltage Source Inverters’, 27 th Annual IEEE Applied Power Electronics Conference and Exposition, Orlando, 2012.
  • Shojaei, A., Fathi, S.H., ‘An Improved Selective Harmonics Elimination Method to Reduce Voltage THD in Parallel Multilevel Inverters’, International Review of Electrical Engineering, Vol. 6-7, 3196-3203, 2011.
  • Kavousi, A., Vahidi, B. Salehi, R., Bakhshizadeh, M., Farokhnia, N., Fathi, S.S., ‘Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters’, IEEE Transactions on Power Electronics, Vol. 27-4, 1689-1696, 2012.
  • Filho, F., Maia, H.Z., Mateus, T.H.A., Ozpineci, B., Tolbert, L.M., Pinto, J.O.P., ‘Adaptive Selective Harmonic Minimization Based on ANNs for Cascade Multilevel Inverters With Varying DC Sources’, IEEE Transactions on Industrial Electronics, Vol. 60-5, 1955-1962, 20
  • Arifoğlu, U., ‘Güç Sistemlerinin Bilgisayar Destekli Analizi’, Alfa Yayınları, İstanbul, 2002. http://www.mathworks.com/products/matlab/ (Erişim Tarihi: Mart 2013)
  • Xue, Y., Chang, L., Kjaer, S.B., Bordonau, J., Shimizu, T., ‘Topologies of Single-phase Inverters for Small Distributed Power Generators: An Overview’, IEEE Transactions on Power Electronics, Vol. 19-5, 1305-1314, 200
Toplam 8 adet kaynakça vardır.

Ayrıntılar

Birincil Dil Türkçe
Konular Mühendislik
Bölüm Araştırma Makalesi
Yazarlar

Faruk Yalçın Bu kişi benim

Uğur Arifoğlu Bu kişi benim

Yayımlanma Tarihi 1 Haziran 2013
Gönderilme Tarihi 21 Mayıs 2013
Kabul Tarihi 22 Haziran 2013
Yayımlandığı Sayı Yıl 2013 Cilt: 17 Sayı: 3

Kaynak Göster

APA Yalçın, F., & Arifoğlu, U. (2013). Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı. Sakarya University Journal of Science, 17(3), 329-335. https://doi.org/10.16984/saufbed.84223
AMA Yalçın F, Arifoğlu U. Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı. SAUJS. Aralık 2013;17(3):329-335. doi:10.16984/saufbed.84223
Chicago Yalçın, Faruk, ve Uğur Arifoğlu. “Seçmeli Harmonik Eliminasyon Metodu Tabanlı Bir Fazlı Evirici tasarımı”. Sakarya University Journal of Science 17, sy. 3 (Aralık 2013): 329-35. https://doi.org/10.16984/saufbed.84223.
EndNote Yalçın F, Arifoğlu U (01 Aralık 2013) Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı. Sakarya University Journal of Science 17 3 329–335.
IEEE F. Yalçın ve U. Arifoğlu, “Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı”, SAUJS, c. 17, sy. 3, ss. 329–335, 2013, doi: 10.16984/saufbed.84223.
ISNAD Yalçın, Faruk - Arifoğlu, Uğur. “Seçmeli Harmonik Eliminasyon Metodu Tabanlı Bir Fazlı Evirici tasarımı”. Sakarya University Journal of Science 17/3 (Aralık 2013), 329-335. https://doi.org/10.16984/saufbed.84223.
JAMA Yalçın F, Arifoğlu U. Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı. SAUJS. 2013;17:329–335.
MLA Yalçın, Faruk ve Uğur Arifoğlu. “Seçmeli Harmonik Eliminasyon Metodu Tabanlı Bir Fazlı Evirici tasarımı”. Sakarya University Journal of Science, c. 17, sy. 3, 2013, ss. 329-35, doi:10.16984/saufbed.84223.
Vancouver Yalçın F, Arifoğlu U. Seçmeli harmonik eliminasyon metodu tabanlı bir fazlı evirici tasarımı. SAUJS. 2013;17(3):329-35.

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