Ascon Şifreleme Algoritmasını Hızlandırmak İçin Özel TTA Operasyonları

Abstract

Hafif kriptografi algoritmaları, özellikle Nesnelerin İnterneti (IoT) cihazları, gömülü sistemler ve mobil platformlar gibi kaynak kısıtlı ortamlarda, modern uygulamalarda giderek daha önemli hale geliyor. Ascon şifreleme algoritması, düşük güç tüketen cihazların taleplerini karşılayan modern, güvenli ve verimli bir kriptografik şemadır. Ancak, algoritmanın bazı adımları hesaplama açısından yoğun olup performans sorunlarına yol açmaktadır. Bu çalışmada, Transport-Triggered Architecture (TTA) işlemcilerde Ascon şifreleme algoritmasını hızlandırmak için özel operasyonlar önerilmiştir. Donanım kaynaklarının daha verimli kullanılması için, özel işlemler düşük karmaşıklık ve yüksek verimliliğe sahip olacak şekilde tasarlanmıştır. İşlemleri genel amaçlı 64 bitlik bir TTA işlemcisine entegre etmek için OpenASIP aracı kullanılmıştır. Elde edilen uygulamaya özgü çekirdek, Donanım Tanımlama Dili'nde (HDL) gerçeklenmiş ve FPGA için sentezlenmiştir. Farklı taşıma veri yolu yapılandırmaları için performans kazanımını analiz edilmektedir. Elde edilen sonuçlar, Ascon-AEAD128 şifreleme ve şifre çözme aşamalarının %38 ila %50 oranında hızlandırıldığını göstermektedir. Sentez sonuçlarıyla birlikte değerlendirildiğinde, donanım kaynaklarında oldukça makul bir artışla önemli bir performans artışı elde edildi. Çalışma ayrıca TTA'nın düşük güç tüketimi ve yüksek verimlilik gerektiren kriptografik uygulamaları hızlandırmak için uygun bir yöntem olduğunu vurgulamaktadır.

Keywords

• Hafif kriptografi
• Komut seti genişletme
• Uygulamaya özgü işlemci tasarımı
• Özel işlemci tasarımı
• FPGA gerçeklemesi

Custom TTA Operations for Accelerating the Ascon Encryption Algorithm

Abstract

Lightweight cryptography is becoming increasingly important in modern applications, especially in resource-constrained environments such as Internet of Things (IoT) devices, embedded systems and mobile platforms. The Ascon encryption algorithm is a modern, secure and efficient cryptographic scheme that meets the demands of low-power devices. However, some steps of the algorithm are computationally intensive, leading to performance issues. In this study, custom operations are proposed to accelerate the Ascon encryption algorithm on Transport-Triggered Architecture (TTA) processors. In order to make more efficient use of hardware resources, the custom operations are designed to have low complexity and high efficiency. The OpenASIP tool was employed to integrate the operations into a general purpose 64-bit TTA processor. The resulting application-specific core was implemented in Hardware Description Language (HDL) and synthesised for FPGA. The performance gain is analysed for different transport bus configurations. The results obtained show that the Ascon-AEAD128 encryption and decryption phases are accelerated by 38% to 50%. When evaluated together with the synthesis results, a significant performance gain was achieved with a very reasonable increase in hardware resources. The study also emphasises that the TTA is a suitable method for accelerating cryptographic applications that require low power consumption and high efficiency.

Keywords

• Lightweight cryptography
• Instruction set extension
• Custom processor design
• Application-specific processor design
• FPGA implementation

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