Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture

Volume: 9 Number: 1 April 1, 2013
  • Halit Öztekin
  • Ali Gülbağ
  • Feyzullah Temurtaş
TR EN

BZK.SAU.FPGA Mikro Bilgisayar Mimarisi için Ekran Alanı ve Karakter Organizasyonu ve Kontrolü

Abstract

Ekran alanında görüntü elde edebilmek için VGA ekran donanımına ait kontrol sinyalleri olan renk ve senkronize sinyallerinin yönetilmesi gerekmektedir. Bu sinyaller kontrol edilerek ekran donanımındaki piksellerin yakılması veya söndürülmesi neticesinde istenilen görüntü elde edilir. Bu çalışmada, bu sinyalleri kontrol ederek ekrandaki görüntünün oluşmasını sağlayan ekran kontrolörü lojik kapı seviyesinde donanımsal olarak inşa edilmiştir. Bu amaçla, BZK.SAU.FPGA Mikro bilgisayar mimarisi kullanılmıştır ve 640×480 piksel çözünürlüğüne sahip VGA tipinde bir ekran tercih edilmiştir.

Keywords

Details

Primary Language

English

Subjects

-

Journal Section

-

Authors

Halit Öztekin This is me

Ali Gülbağ This is me

Feyzullah Temurtaş This is me

Publication Date

April 1, 2013

Submission Date

April 1, 2013

Acceptance Date

-

Published in Issue

Year 2013 Volume: 9 Number: 1

APA
Öztekin, H., Gülbağ, A., & Temurtaş, F. (2013). Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering, 9(1), 1-9. https://izlik.org/JA88LC62ZR
AMA
1.Öztekin H, Gülbağ A, Temurtaş F. Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering. 2013;9(1):1-9. https://izlik.org/JA88LC62ZR
Chicago
Öztekin, Halit, Ali Gülbağ, and Feyzullah Temurtaş. 2013. “Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering 9 (1): 1-9. https://izlik.org/JA88LC62ZR.
EndNote
Öztekin H, Gülbağ A, Temurtaş F (April 1, 2013) Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering 9 1 1–9.
IEEE
[1]H. Öztekin, A. Gülbağ, and F. Temurtaş, “Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture”, Electronic Letters on Science and Engineering, vol. 9, no. 1, pp. 1–9, Apr. 2013, [Online]. Available: https://izlik.org/JA88LC62ZR
ISNAD
Öztekin, Halit - Gülbağ, Ali - Temurtaş, Feyzullah. “Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering 9/1 (April 1, 2013): 1-9. https://izlik.org/JA88LC62ZR.
JAMA
1.Öztekin H, Gülbağ A, Temurtaş F. Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering. 2013;9:1–9.
MLA
Öztekin, Halit, et al. “Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture”. Electronic Letters on Science and Engineering, vol. 9, no. 1, Apr. 2013, pp. 1-9, https://izlik.org/JA88LC62ZR.
Vancouver
1.Halit Öztekin, Ali Gülbağ, Feyzullah Temurtaş. Display Area and Character Organization and Control for BZK.SAU.FPGA Micro Computer Architecture. Electronic Letters on Science and Engineering [Internet]. 2013 Apr. 1;9(1):1-9. Available from: https://izlik.org/JA88LC62ZR