An integrated approach to line assignment problem in electronic card production considering process flow

Yıl 2024, Cilt: 39 Sayı: 4, 2409 - 2422, 20.05.2024

Ömer Faruk Ünal , Şeyda Serdarasan

https://doi.org/10.17341/gazimmfd.1340123

Öz

The efficient operation of electronic cards, which are used as a subcomponent in many products such as telephones, televisions, computers, automobiles and smart devices, depends on appropriate design, production and quality. High product variety in production processes, production capacity constraints and setup times in model changes can result in non-value-added intermediate operations and lead times, resulting in inefficiency.

This study proposes an effective approach to the line assignment problem for electronic board production addressing efficiency increase and cost reduction. The resulting production plan, which will provide the highest production amount of electronic cards in different assembly and testing lines, considers different characteristics of electronic cards (eg. bill of materials, common component use, number of components, demand, operation times and process flow). The PCB line assignment problem, which is in the NP-hard problem class, is solved by clustering analysis and a 0-1 mixed integer mathematical model. The results of the model were analyzed with a simulation model that models the operation of the production line.

In the application made with real data, 22% improvement was achieved in the production amount compared to the current situation by using the proposed approach. The proposed approach can be applied to the scheduling of an electronic board manufacturer with multiple surface mount technology (SMT) assembly lines, multiple process flows, and multiple testing stations.

Anahtar Kelimeler

PCB assembly, PCB line assignment problem, Electronic card, two step clustering

Elektronik kart üretiminde hat atama problemi için süreç akışını dikkate alan bütünleşik bir yaklaşım

Öz

Telefon, televizyon, bilgisayar, otomobil ve akıllı cihazlar gibi birçok üründe bir alt bileşen olarak kullanılan elektronik kartların verimli bir şekilde çalışmaları uygun tasarım, üretim ve kaliteye bağlıdır. Üretim süreçlerinde yüksek ürün çeşitliliği, üretim kapasite kısıtları ve model değişikliklerindeki hazırlık süreleri, katma değersiz ara operasyon ve sürelerle sonuçlanarak verimsizliğe neden olabilir.

Bu çalışma, elektronik kart üretimi için hat atama problemlerini ele alarak verimlilik artışı ve maliyet düşürme amaçlı yenilikçi ve etkili yaklaşımlar önermektedir. Elektronik kartların farklı üretim ve test hatlarında en büyük üretim miktarını sağlayacak üretim planı farklı kriterler (örn. ürün ağacı, ortak bileşen kullanımı, bileşen adetleri, talepler, operasyon süreleri ve süreç akışında uğrayacağı istasyonlar ve sıralar) göz önünde bulundurularak belirlenmektedir. NP-zor problemi sınıfında yer alan PCB hat atama problemi, kümeleme analizi ve 0-1 karma tamsayılı matematiksel modelle çözülmektedir. Modelin sonuçları üretim hattının işleyişini modelleyen simülasyon modeli ile analiz edilmiştir.

Gerçek verilerle yapılan uygulamada, önerilen yaklaşım kullanılarak üretim miktarında mevcut duruma oranla %22 oranında iyileşme sağlanmıştır. Önerilen yaklaşım, birden çok yüzey montaj teknolojisi (SMT) özelliğine sahip otomatik dizgi hattı, birden çok süreç akışı ve birden çok test ayar istasyonuna sahip bir elektronik kart üreticisinin çizelgelemesi için uygulanabilir.

Anahtar Kelimeler

hat atama problemi, elektronik kart, PCB montaj, iki adımlı kümeleme, simülasyon

Kaynakça

• 1. Ho, W., Ji, P., PCB assembly line assignment: A genetic algorithm approach. Journal of Manufacturing Technology Management, 16, 682–692, 2005.
• 2. Ellis, K.P., Bhoja, S., Optimization of the assignment of circuit cards to assembly lines in electronics assembly, Int J Prod Res, 40, 2609–2631, 2002.
• 3. Franke, J., Wang, L., Bock, K., Wilde, J., Electronic module assembly. CIRP Annals, 70, 471–493, 2021.
• 4. He, T., Li, D., Yoon, S.W., A Heuristic Algorithm to Balance Workloads of High-speed SMT Machines in a PCB Assembly Line, Procedia Manuf., 11, 1790–1797, 2017.
• 5. Ayob, M., Kendall, G., A survey of surface mount device placement machine optimisation: Machine classification. Eur J Oper Res, 186, 893–914, 2008.
• 6. Tsai, T.-N., Selection of the optimal configuration for a flexible surface mount assembly system based on the interrelationships among the flexibility elements, Comput Ind Eng. 67, 146–159, 2014.
• 7. Noroozi, A., Mokhtari, H., Scheduling of printed circuit board (PCB) assembly systems with heterogeneous processors using simulation-based intelligent optimization methods, Neural Comput Appl., 26, 857–873, 2015.
• 8. Mumtaz, J., Guan, Z., Yue, L., Wang, Z., Ullah, S., Rauf, M., Multi-Level Planning and Scheduling for Parallel PCB Assembly Lines Using Hybrid Spider Monkey Optimization Approach, IEEE Access, 7, 18685–18700, 2019.
• 9. Kilincci, Ö., Assembly line balancing problem with resource and sequence-dependent setup times, Journal of the Faculty of Engineering and Architecture of Gazi University, 38, 557–570, 2023.
• 10. Kuo, R.J., Lin, L.M., Application of a hybrid of genetic algorithm and particle swarm optimization algorithm for order clustering, Decis Support Syst, 49, 451–462, 2010.
• 11. Ellis, K.P., Vittes, F.J., Kobza, J.E., Optimizing the Performance of a Surface Mount Placement Machine, IEEE Transactions on Electronics Packaging Manufacturing. 24, 2001.
• 12. Bhaskar, G., Narendran, T.T., Grouping PCBs for set-up reduction: a maximum spanning tree approach, Int J Prod Res, 34, 621–632, 1996.
• 13. Yu, S., Kim, D., Park, S., Integer programming approach to the printed circuit board grouping problem, Int J Prod Res, 43, 1667–1684, 2005.
• 14. Huang, J.-P., Pan, Q.-K., Suganthan, P.N., Effective constructive and composite heuristics for grouping printed circuit boards in the electronic assembly industry, Engineering Optimization, 54, 1758–1772, 2022.
• 15. Kulak, O., Yilmaz, I.O., Günther, H.O., A GA-based solution approach for balancing printed circuit board assembly lines, OR Spectrum, 30, 469–491, 2008.
• 16. Chen, Y., Zhong, J., Mumtaz, J., Zhou, S., Zhu, L., An improved spider monkey optimization algorithm for multi-objective planning and scheduling problems of PCB assembly line, Expert Syst Appl, 229, 120600, 2023.
• 17. Sun, D.-S., Lee, T.-E., Kim, K.-H., Component allocation and feeder arrangement for a dual-gantry multi-head surface mounting placement tool, Int J Prod Econ, 95, 245–264, 2005.
• 18. Li, D., He, T., Yoon, S.W., Clustering-Based Heuristic to Optimize Nozzle and Feeder Assignments for Collect-and-Place Assembly, IEEE Transactions on Automation Science and Engineering, 16, 755–766, 2019.
• 19. Mumtaz, J., Guan, Z., Yue, L., Zhang, L., He, C., Hybrid spider monkey optimisation algorithm for multi-level planning and scheduling problems of assembly lines, Int J Prod Res, 58, 6252–6267, 2020.
• 20. Ho, W., Ji, P., Optimal Production Planning for PCB Assembly, Springer, London, 2007.
• 21. Randhawa, S.U., McDowell, E.D., Faruqui, S.-D., An integer programming application to solve sequencer mix problems in printed circuit board production, Int J Prod Res, 23, 543–552, 1985.
• 22. Shtub, A., Shtub, A., Maimon, O., Role of similarity measures in PCB grouping procedures, Int J Prod Res, 30, 973–983, 1992.
• 23. Li, K.H., Lee, S.S.F., Li, C.K., Dawel, L., Application of fuzzy c-means algorithm in smt assembly grouping problem, HKIE Transactions Hong Kong Institution of Engineers, 10, 20–25, 2003.
• 24. Yilmaz, I.O., Grunow, M., Günther, H.O., Yapan, C., Development of group setup strategies for makespan minimisation in PCB assembly, Int J Prod Res, 45, 871–897, 2007.
• 25. García-Nájera, A., Brizuela, C.A., Martínez-Pérez, I.M., An efficient genetic algorithm for setup time minimization in PCB assembly, The International Journal of Advanced Manufacturing Technology, 77, 973–989, 2015.
• 26. Hu, K.-J., Fuzzy goal programming technique for solving flexible assignment problem in PCB assembly line, Journal of Information and Optimization Sciences, 38, 423–442, 2017.
• 27. Hillier, M.S., Brandeau, M.L., Optimal Component Assignment and Board Grouping in Printed Circuit Board Manufacturing, Oper Res, 46, 675–689, 1998.
• 28. Balakrishnan, A., Vanderbeck, F., A Tactical Planning Model for Mixed-Model Electronics Assembly Operations, Oper Res, 47, 395–409, 1999.
• 29. Hillier, M.S., Brandeau, M.L., Cost minimization and workload balancing in printed circuit board assembly. IIE Transactions (Institute of Industrial Engineers), 33, 547–557, 2001.
• 30. Wu, Y., Ji, P., A scheduling problem for PCB assembly: A case with multiple lines, International Journal of Advanced Manufacturing Technology, 43, 1189–1201, 2009.
• 31. Kaufman, L., Rousseeuw, P.J., Finding Groups in Data, John Wiley & Sons, Hoboken, NJ, 1990.
• 32. Norušis, M.J., IBM SPSS Statistics 19 Advanced Statistical Procedures Companion, Prentice Hall, 2012.
• 33. Jain, A.K., Dubes, R.C., Algorithms for clustering data, Prentice Hall, 1988.
• 34. Kelton, W.D., Zupick, N.B., Ivey, N.J., Simulation with Arena, McGraw Hill, 2024.
• 35. Mooi, E., Sarstedt, M., A Concise Guide to Market Research, Springer, Berlin, 2011.