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Karnaugh Haritasında Çıkarma Tabanlı Yeni bir Sadeleştirme Yöntemi

Year 2017, Volume: 5 Issue: 2, 63 - 72, 25.06.2017

Abstract

Karnaugh haritası (K-Map)
mantıksal ifadeleri sadeleştirmek için kullanılan en yaygın yöntemlerden birisidir.
K-Map’ in sağladığı en önemli avantaj, bir elektronik devreyi minimum fiziksel
kapı sayısıyla gerçekleştirmektir. K-Map konusu elektronik ve mantık
derslerinin en önemli konularından birisidir ancak öğrenciler K-Map kullanarak
sadeleştirme yaparken bazen grupları tespit edememektedir. Bu çalışmada K-Map’
te bulunan büyük grupları kolayca tespit edebilmek için eleman eklenmiştir.
Eleman ekleme sayesinde büyük gruplar rahatlıkla tespit edilebilmektedir. Büyük
gruplar tespit edildikten sonra gerçek ifadeyi elde etmek için eklenen elemanlar
çıkarılmıştır. K-Map üzerinde sadeleştirme yaparken sadece mantıksal toplama (VEYA)
ve mantıksal çarpma (VE) işlemleri kullanılmaktadır. Bu makale K-Maplerde
çıkarma işleminin yapılabileceği gösterilmiş ve önerilen yöntem De-Morgan
teoremi kullanılarak ispat edilmiştir. Bu çalışmada, literatürde ilk kez K-Map
üzerinde çıkarma işlemi gerçekleştirilmiştir ve K-Mapler için çıkarma tabanlı
efektif bir sadeleştirme yöntemi önerilmiştir. De- Morgan teoremi ve deneysel
sonuçlar önerilen yöntemin doğruluğunu göstermektedir.

References

  • P. K. Lala, Principles Of Modern Digital Design, John Wiley & Sons, Inc, 2007.
  • A. K. Maini, Digital Electronics Principles, Devices and Applications, John Wiley & Sons Ltd, The Atrium, Southern Gate, Chichester, West Sussex POl9 8SQ, England, 2007.
  • M. Balch, Complete Digital Design, A Comprehensive Guide to Digital Electronics and Computer System Architecture, The McGrawHill Companies, Inc., 2003.
  • Das, K., De, D., & De, M. (2016). Modified Ternary Karnaugh Map and Logic Synthesis in Ternary Quantum Dot Cellular Automata. IETE Journal of Research, 1-12.
  • R. Fadous, J.Forsyth, Finding candidate keys for relational data bases, ICMD,1975,pp.203-210.
  • Rajput, D. S., Thakur, R. S., & Thakur, G. S. (2014). Karnaugh Map Approach for Mining Frequent Termset from Uncertain Textual Data. British Journal of Mathematics & Computer Science, 4(3), 333.
  • Rushdi, A. M., & Al-Yahya, H. A. (2000). A Boolean minimization procedure using the variableentered Karnaugh map and the generalized consensus concept. International Journal of Electronics, 87(7), 769-794.
  • Karnaugh maps, http://home.anadolu.edu.tr/~egermen/EEM232/Week%203.pdf (Son Erişim Tarihi: 30/12/2016).
  • Miller, J. F., Job, D., & Vassilev, V. K. (2000). Principles in the evolutionary design of digital circuits—Part I. Genetic programming and evolvable machines, 1(1-2), 7-35.
  • P. Chuang, Logic Simplication & Karnaugh Map, Lecture Note: http://www.ee.ic.ac.uk/pcheung/teaching/ee1_digital/Lecture5-Karnaugh%20Map.pdf, 2007.
  • Rathore, T. S. (2016). A Note on the Size of a Karnaugh Map. IETE Journal of Education, 1-4.
  • D.E. Muller ‘Application of Boolean algebra to switching circuit design and to error detection’, IRE Transactions on Electronic Computers, EC-3, pp. 6–12, 1954.72 Türker TUNCER / GU J Sci, Part C, 5(2):63-72 (2017)
  • M. Tabandeh, Application of Karnaugh map for easy generation of error correcting codes, Scientia Iranica D (2012) 19 (3), 690–695.
  • D. W. Pessen, Industrial Automation - Circuit Design and Components. John Wiley, New York. 1989.
  • S.-K. Sim, P. S. K. Chua, Symbolic pattern manipulation of KarnaughVeitch maps for pneumatic circuits, Artifcial Intelligence in Engineering 10 (1996) 71-83.
  • Mishchenko, A., Steinbach, B., & Perkowski, M., An algorithm for bi-decomposition of logic functions. In Proceedings of the 38th annual Design Automation Conference (pp. 103-108). ACM., (2001, June).
  • M. E., Holder, A modified Karnaugh map technique. IEEE Transactions on Education, 48(1), 206- 207, (2005).
  • Yang, M., Li, Y., Zeng, L., Jin, D., & Su, L. (2012, September). Karnaugh-map like online embedding algorithm of wireless virtualization. In Wireless Personal Multimedia Communications (WPMC), 2012 15th International Symposium on (pp. 594-598). IEEE.
  • A. M., Rushdi, Improved variable-entered Karnaugh map procedures. Computers & electrical engineering, 13(1), 41-52, (1987).
Year 2017, Volume: 5 Issue: 2, 63 - 72, 25.06.2017

Abstract

References

  • P. K. Lala, Principles Of Modern Digital Design, John Wiley & Sons, Inc, 2007.
  • A. K. Maini, Digital Electronics Principles, Devices and Applications, John Wiley & Sons Ltd, The Atrium, Southern Gate, Chichester, West Sussex POl9 8SQ, England, 2007.
  • M. Balch, Complete Digital Design, A Comprehensive Guide to Digital Electronics and Computer System Architecture, The McGrawHill Companies, Inc., 2003.
  • Das, K., De, D., & De, M. (2016). Modified Ternary Karnaugh Map and Logic Synthesis in Ternary Quantum Dot Cellular Automata. IETE Journal of Research, 1-12.
  • R. Fadous, J.Forsyth, Finding candidate keys for relational data bases, ICMD,1975,pp.203-210.
  • Rajput, D. S., Thakur, R. S., & Thakur, G. S. (2014). Karnaugh Map Approach for Mining Frequent Termset from Uncertain Textual Data. British Journal of Mathematics & Computer Science, 4(3), 333.
  • Rushdi, A. M., & Al-Yahya, H. A. (2000). A Boolean minimization procedure using the variableentered Karnaugh map and the generalized consensus concept. International Journal of Electronics, 87(7), 769-794.
  • Karnaugh maps, http://home.anadolu.edu.tr/~egermen/EEM232/Week%203.pdf (Son Erişim Tarihi: 30/12/2016).
  • Miller, J. F., Job, D., & Vassilev, V. K. (2000). Principles in the evolutionary design of digital circuits—Part I. Genetic programming and evolvable machines, 1(1-2), 7-35.
  • P. Chuang, Logic Simplication & Karnaugh Map, Lecture Note: http://www.ee.ic.ac.uk/pcheung/teaching/ee1_digital/Lecture5-Karnaugh%20Map.pdf, 2007.
  • Rathore, T. S. (2016). A Note on the Size of a Karnaugh Map. IETE Journal of Education, 1-4.
  • D.E. Muller ‘Application of Boolean algebra to switching circuit design and to error detection’, IRE Transactions on Electronic Computers, EC-3, pp. 6–12, 1954.72 Türker TUNCER / GU J Sci, Part C, 5(2):63-72 (2017)
  • M. Tabandeh, Application of Karnaugh map for easy generation of error correcting codes, Scientia Iranica D (2012) 19 (3), 690–695.
  • D. W. Pessen, Industrial Automation - Circuit Design and Components. John Wiley, New York. 1989.
  • S.-K. Sim, P. S. K. Chua, Symbolic pattern manipulation of KarnaughVeitch maps for pneumatic circuits, Artifcial Intelligence in Engineering 10 (1996) 71-83.
  • Mishchenko, A., Steinbach, B., & Perkowski, M., An algorithm for bi-decomposition of logic functions. In Proceedings of the 38th annual Design Automation Conference (pp. 103-108). ACM., (2001, June).
  • M. E., Holder, A modified Karnaugh map technique. IEEE Transactions on Education, 48(1), 206- 207, (2005).
  • Yang, M., Li, Y., Zeng, L., Jin, D., & Su, L. (2012, September). Karnaugh-map like online embedding algorithm of wireless virtualization. In Wireless Personal Multimedia Communications (WPMC), 2012 15th International Symposium on (pp. 594-598). IEEE.
  • A. M., Rushdi, Improved variable-entered Karnaugh map procedures. Computers & electrical engineering, 13(1), 41-52, (1987).
There are 19 citations in total.

Details

Primary Language Turkish
Subjects Engineering
Journal Section Tasarım ve Teknoloji
Authors

Türker Tuncer

Publication Date June 25, 2017
Submission Date January 7, 2017
Published in Issue Year 2017 Volume: 5 Issue: 2

Cite

APA Tuncer, T. (2017). Karnaugh Haritasında Çıkarma Tabanlı Yeni bir Sadeleştirme Yöntemi. Gazi Üniversitesi Fen Bilimleri Dergisi Part C: Tasarım Ve Teknoloji, 5(2), 63-72.

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