Model Tabanlı Tasarım Metotları Kullanılarak Gerçek Zamanlı Bir Görüntü İşleme Sisteminin Tasarımı ve Gerçeklemesi

Yıl 2019, Cilt: 22 Sayı: 4, 827 - 838, 01.12.2019

Mustafa Yusuf Demirci , İsmail Yabanova

https://doi.org/10.2339/politeknik.423603

Cited By: 2

Öz

Bu çalışmada gerçek zamanlı bir görüntü işleme
sisteminin tasarımı Zynq mimarisi ve model tabanlı tasarım araçları
kullanılarak gerçekleştirilmiştir. Sistemde FPGA ve mikroişlemci birleşiminden
oluşan yeni bir mimari olan Zynq-7000 yongasını barındıran bir geliştirme kartı
kullanılmış ve bu sisteme uyumlu olan yüksek çözünürlüklü bir kamera ile alınan
görüntü üzerinde gri ton dönüşümü, kenar bulma, gürültü giderme ve
keskinleştirme filtreleri uygulanarak gerçek zamanlı bir biçimde işlenmiş olan
görüntü monitöre aktarılmıştır. Sistemde kullanılan filtre donanım tasarımları
HDL kodu yazılmadan Matlab/Simulink ortamında HDL Coder aracı kullanılarak
gerçekleştirilmiştir. Kameradan görüntü alan sistemin donanım tasarımı Xilinx
firmasının geliştirdiği Vivado Suite isimli araçla yine model tabanlı olarak
gerçekleştirilmiştir. Son olarak tasarlanan donanıma uygun yazılımın geliştirilmesi
yapılarak sonuçlar ve sistemin kaynak kullanımı incelenmiştir. Yapılan çalışmalar
sonucunda sistemin gerçek zamanlı olarak başarıyla çalıştığı görülmüştür.

Anahtar Kelimeler

Görüntü İşleme, Gerçek Zamanlı Sistemler, FPGA, Zynq, Model Tabanlı Tasarım

Design and Implementation of a Real-Time Image Processing System Using Model-Based Design Methods

Öz

In this study, design of a
real-time image processing system was implemented using Zynq architecture and
model-based design tools. System uses a development board that includes
Zynq-7000 chip, a new architecture which consists of FPGA and microprocessor,
and the images were captured with a high-resolution camera compatible with this
system. Processed images transferred to the monitor in real-time with applying
grayscale conversion, edge detection, noise reduction and sharpening filters.
The filter hardware designs used in the system were implemented by using HDL
Coder tool in Matlab / Simulink environment without using hand-coded HDL. The
hardware design of the system that takes images from the camera has been
implemented with the model-based hardware development tool Vivado Suite which
developed by Xilinx company. Finally, an appropriate software for the hardware
has been developed and results and the resource usage of the system have been
analyzed. As a result of the work done, it has been observed that the system
works successfully in real time.

Anahtar Kelimeler

Image processing, real-time systems, FPGA, Zynq, model-based design

Kaynakça

• [1] Kahraman, E., Ünal, V., “Gerçek Zamanlı Gömülü Sistem ve Yazılım Tasarımı’nda ASELSAN Yaklasımı”, EMO - III.Ulusal Yazılım Mühendisliği Sempozyumu UYMS, Ankara, (2007).
• [2] Abdelgawad, H. M., Safar, M., ve Wahba, A. M., “High level synthesis of canny edge detection algorithm on Zynq platform”, Int. J. Comput. Electr. Autom. Control Inf. Eng, 9(1), 148-152, (2015).
• [3] Crockett, L. H., Elliot, R. A., Enderwitz, M. A., & Stewart, R. W., “The Zynq Book: Embedded Processing with the Arm Cortex-A9 on the Xilinx Zynq-7000 All Programmable Soc”, Strathclyde Academic Media, 1st Edition, Glasgow, Scotland, UK. (2014).
• [4] Russell, M., Fischaber, S., “OpenCV based road sign recognition on Zynq”, Industrial Informatics (INDIN), 11th IEEE International Conference (pp. 596-601), (2013).
• [5] Monson, J., Wirthlin, M., ve Hutchings, B. L., “Implementing high-performance, low-power FPGA-based optical flow accelerators in C”, Application-Specific Systems, Architectures and Processors (ASAP), IEEE 24th International Conference (pp. 363-369), (2013).
• [6] Sümer, Ö., “An Embedded Design And Implementation Of A Facial Expression Recognition System”, Yüksek Lisans Tezi, İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, İstanbul, (2014).
• [7] Altuncu, M. A., Güven, T., Becerikli, Y., ve Şahin, S., “Real-time system implementation for image processing with hardware/software co-design on the Xilinx Zynq platform”, International Journal of Information and Electronics Engineering, 5(6), 473, (2015).
• [8] Chhabra, S., Jain, H., ve Saini, S., “FPGA based hardware implementation of automatic vehicle license plate detection system”, Advances in Computing, Communications and Informatics (ICACCI), IEEE 2016 International Conference (pp. 1181-1187), (2016).
• [9] Shi, Z., “Rapid Prototyping of an FPGA-Based Video Processing System”, Yüksek Lisans Tezi, Virginia Tech - Virginia Polytechnic Institute and State University, Computer Engineering, Blacksburg, Virginia, (2016).
• [10] Al-Naqshbndi, S., “Hardware Acceleration of Computer Vision Application”, Yüksek Lisans Tezi, Delft University of Technology, Faculty of Electrical Engineering, Mathematics and Computer Science, Netherlands, (2016).
• [11] “HDMI Input/Output FMC Module with Camera Interface Hardware Guide”, Rev. 1.0, Avnet Inc., (2015).
• [12] “ON Semiconductor PYTHON 1300-C CAMERA MODULE Hardware User Guide”, Ver. 1.0, Avnet Inc., (2015).
• [13] “Zedboard Hardware User’s Guide”, Ver. 7.0, Avnet Inc., (2014).
• [14] “Zynq-7000 All Programmable SoC Data Sheet: Overview (DS190)”, Ver. 1.11, Xilinx Inc., (2017).
• [15] “FMC-HDMI-CAM + PYTHON-1300-C Frame Buffer Design”, Ver. 2015.2, Avnet Inc., (2015).
• [16] “FMC-HDMI-CAM + PYTHON-1300-C Vivado HLS Reference Design”, Ver. 2015.4, Avnet Inc., (2016).
• [17] “HDL Coder Getting Started Guide”, version 3.11 R2017b, Mathworks Inc., (2017).
• [18] “Zynq-7000 All Programmable SoC Software Developers Guide (UG821)”, Ver. 12.0, Xilinx Inc., (2015).
• [19] “Xilinx Video and Image Processing Pack”, https://www.xilinx.com/products/intellectual-property/ef-di-vid-img-ip-pack.html, Erişim (11.05.2018).
• [20] “Avnet HDL Github Repository”, https://github.com/Avnet/hdl/tree/master/IP, Erişim (11.05.2018).
• [21] “Color Filter Array Interpolation v7.0 LogiCORE IP Product Guide (PG002)”, Xilinx Inc., (2015).
• [22] “Video On-Screen Display v6.0 LogiCORE IP Product Guide (PG010)”, Xilinx Inc., (2015).
• [23] “RGB to YCrCb Color-Space Converter v7.1 LogiCORE IP Product Guide. (PG013)”, Xilinx Inc., (2015).
• [24] “Video Timing Controller v6.1 LogiCORE IP Product Guide. (PG016)”, Xilinx Inc., (2017).
• [25] “Chroma Resampler v4.0 LogiCORE IP Product Guide. (PG012)”, Xilinx Inc., (2015).
• [26] “AXI Video Direct Memory Access v6.2 LogiCORE IP Product Guide. (PG020)”, Xilinx Inc., (2016).
• [27] “Matlab Online Documentation : Model Design for AXI4-Stream Video Interface Generation”,https://www.mathworks.com/help/supportpkg/xilinxzynq7000/ug/model-design-for-axi4-stream-video-interface-generation.html, Erişim (11.05.2018).
• [28] “Matlab Online Documentation : Getting Started with AXI4-Stream Video Interface in Zynq Workflow”, https://www.mathworks.com/help/hdlcoder/examples/getting-started-with-axi4-stream-video-interface-in-zynq-workflow.html#hdlcoder_product-hdlcoder_ip_core_axi4_video, Erişim (11.05.2018).
• [29] “Matlab Online Documentation : Design Video Processing Algorithms for HDL in Simulink”, https://www.mathworks.com/help/visionhdl/gs/design-video-processing-algorithms-for-hdl-in-simulink.html, Erişim (11.05.2018).
• [30] “Matlab Online Documentation : Streaming Pixel Interface”, https://www.mathworks.com/help/visionhdl/ug/streaming-pixel-interface.html, Erişim (11.05.2018).
• [31] “Vision HDL Toolbox Reference”, version 1.5 R2017b, Mathworks Inc., (2017).
• [32] “Image Processing Toolbox Reference”, version 10.1 R2017b, Mathworks Inc., (2017).
• [33] “Display Timing Calculation For Fujitsu MB86R01 SoC”, https://www.fujitsu.com/downloads/MICRO/fme/displaycontrollers/an-mb86r01-display-timing-calc-rev1-20.pdf, Erişim (11.05.2018).