x86-64 Mimarisi Üzerinde AVX2 Optimizasyonu ile HQC Kuantum Sonrası Kriptografi Algoritmasının Yüksek Performanslı İmplementasyonu

Öz

Bu çalışma, kod tabanlı HQC (Hamming Yarı-Döngüsel) algoritmasının pratik uygulanabilirliğini artırmak ve hesaplama darboğazlarının üstesinden gelebilmek için Intel Core i7-9750H @ 2.6 GHz işlemci üzerinde kapsamlı bir optimizasyon analizi sunmaktadır. HQC'nin hesaplama açısından yoğun bileşenleri, özellikle yarı-döngüsel yapılar nedeniyle yüksek dereceli polinomların çarpımı, kodlama/kod çözme işlemleri, hata düzeltme kodları, rastgele hata vektörü üretimi ve modüler indirgemeler, standart yazılım uygulamalarında önemli gecikmelere neden olmaktadır. Bu darboğazı gidermek için, çalışmamızda HQC algoritması işlemcinin vektör işleme yeteneklerinden yararlanabildiği AVX2 (Gelişmiş Vektör Uzantıları 2) tabanlı optimizasyon yöntemi ile optimize edilmiştir. Deneysel veriler, AVX2 optimizasyonunun, özellikle artan güvenlik seviyelerinde, önemli performans kazanımları sağladığını ortaya koymaktadır. Saf HQC algoritmasına kıyasla, AVX2 ile optimize edilmiş uygulamamız HQC-128 parametre seti için 10 kat, HQC-192 için 21 kat ve HQC-256 için 26 kat hız artışı sağlamıştır. Bu sonuçlar, donanıma özgü yazılım optimizasyonlarının, kod tabanlı kuantum sonrası kriptografinin verimliliğini klasik sistemlerle rekabet edebilir bir seviyeye getirmede kritik bir rol oynadığını göstermektedir.

Anahtar Kelimeler

• PQC Optimizasyon Yöntemleri
• AVX2 Optimizasyonu
• HQC Algoritmaları
• ML-KEM Algoritmaları
• Post Kuantum Kriptografi
• Performans Analizi

High-Performance Implementation of HQC Post-Quantum Cryptography Using AVX2 Optimization on x86-64 Architecture

Öz

This study presents a comprehensive optimization analysis of the code-based HQC (Hamming Semi-Cyclic) algorithm on an Intel Core i7-9750H @ 2.6 GHz processor to improve its practical applicability and overcome computational bottlenecks. The computationally intensive components of HQC, particularly the multiplication of high-order polynomials due to semi-cyclic structures, encoding/decoding operations, error correction codes, random error vector generation, and modular reductions, cause significant delays in standard software applications. To address this bottleneck, the HQC algorithm is optimized using an AVX2 (Advanced Vector Extensions2) based optimization method that leverages the processor's vector processing capabilities. Experimental data demonstrate that AVX2 optimization provides significant performance gains, especially at increased security levels. Compared to the pure HQC algorithm, our implementation optimized with AVX2 provided a 10x speed increase for the HQC-128 parameter set, a 21x increase for HQC-192, and a 26x increase for HQC-256. These results demonstrate that hardware-specific software optimizations play a critical role in bringing the efficiency of code-based post-quantum cryptography to a level competitive with classical systems.

Anahtar Kelimeler

• PQC Optimization Methods
• AVX2 Optimization
• HQC Algorithms
• ML-KEM Algorithms
• Post-Quantum Cryptography
• Performance Analysis

Kaynakça

1. [1] P. W. Shor, "Algorithms for quantum computation: discrete logarithms and factoring," in Proc. 35th Annu. Symp. Found. Comput. Sci., Santa Fe, NM, USA, 1994, pp. 124–134.
2. [2] D. Kim, J. Choi, S. Yoon, and S. C. Seo, "Optimized implementation of HQC on Cortex-M4," ICT Express, vol. 11, no. 5, pp. 939–944, Oct. 2025.
3. [3] M.-S. Kim, S.-B. Jeon, and S. Kim, "SRAM based Gaussian noise generation for post quantum cryptography," Sci. Rep., vol. 15, no. 1, Art. no. 43573, Jan. 2025.
4. [4] T. Liu, G. Ramachandran, and R. Jurdak, "Post-quantum cryptography for Internet of Things: A survey on performance and optimization," arXiv preprint arXiv:2401.17538, 2024.
5. [5] R. Aissaoui, J.-C. Deneuville, C. Guerber, and A. Pirovano, "A performant quantum-resistant KEM for constrained hardware: Optimized HQC," in Proc. 21st Int. Conf. Security Cryptography, Dijon, France, 2024, pp. 668–673.
6. [6] G. Alagic et al., "Status report on the fourth round of the NIST post-quantum cryptography standardization process," Nat. Inst. Stand. Technol., Gaithersburg, MD, USA, Tech. Rep. NIST IR 8545, 2025.
7. [7] S. Farooq et al., "Resilience optimization of post-quantum cryptography key encapsulation algorithms," Sensors, vol. 23, no. 12, Art. no. 5379, Jun. 2023.
8. [8] A. Dolmeta, A. Barenghi, V. Bertacco, and G. Pelosi, "TYRCA: A RISC-V tightly-coupled accelerator for code-based cryptography," in Proc. Design, Automat. Test Eur. Conf. (DATE), Lyon, France, 2025, pp. 1–7.

9. [9] L. E. Aimani, "Weight of polynomial products mod (Xn+1)-Application to the HQC cryptosystem," Research Square Preprint, 2025. doi: 10.21203/rs.3.rs-8254043/v1.
10. [10] J. Jeon et al., "A sparse polynomial multiplier for HQC integrating parallelism and power-based side-channel countermeasures," IACR Cryptol. ePrint Archive, Rep. 2025/2003, 2025.
11. [11] B. Dong, H. Feng, and Q. Wang, "OptHQC: Optimize HQC for high-performance post-quantum cryptography," arXiv preprint arXiv:2512.12904, 2025.
12. [12] L. Yu, S.-J. Lin, H. Hou, and Z. Li, "Reed-Solomon coding algorithms based on Reed-Muller transform for any number of parities," IEEE Trans. Comput., vol. 72, no. 9, pp. 2677–2688, Sep. 2023.
13. [13] J. Jang, M. Lee, D. Kwon, S. Hong, and S. Lee, "Efficient polynomial multiplication for HQC on ARM Cortex-M4," IACR Cryptol. ePrint Archive, Rep. 2025/1939, 2025.
14. [14] M. Schöffel, J. Feldmann, and N. Wehn, "Efficient hardware implementation of constant time sampling for HQC," arXiv preprint arXiv:2309.16493, 2025.
15. [15] M.-J. O. Saarinen, "Introduction to side-channel security of NIST PQC standards," presented at the NIST Post-Quantum Cryptography Seminar, 2023.
16. [16] J. Dong et al., "HIGH: Harnessing GPU parallelism for optimized HQC performance," IACR Cryptol. ePrint Archive, Rep. 2026/012, 2026.
17. [17] Q. D. Truong, H. Nguyen, T. T. Nguyen, and H. Lee, "NIST post-quantum cryptography standards: A comprehensive review of theoretical foundations and implementations," IEEE Access, vol. 14, pp. 14069–14097, 2026.
18. [18] W. Wu et al., "Symphony of speeds: Harmonizing Classic McEliece cryptography with GPU innovation," arXiv preprint arXiv:2601.07779, 2026.
19. [19] D. T. Nguyen and K. Gaj, "Fast NEON-based multiplication for lattice-based NIST post-quantum cryptography finalists," in Post-Quantum Cryptography, Lecture Notes in Computer Science, vol. 12841, 2021, pp. 234–254.
20. [20] P. Karl, F. Antognazza, A. Barenghi, G. Pelosi, and G. Sigl, "High-performance FPGA accelerator for CROSS," IACR Cryptol. ePrint Archive, Rep. 2025/1161, 2025.
21. [21] Y. Kim, S. Yoon, and S. C. Seo, "Vectorized implementation of Kyber and Dilithium on 32-bit Cortex-A series," IEEE Access, vol. 12, pp. 104414–104428, 2024.
22. [22] F. Antognazza, A. Barenghi, and G. Pelosi, "An efficient and unified RTL accelerator design for HQC-128, HQC-192, and HQC-256," IEEE Trans. Comput., vol. 74, no. 7, pp. 2306–2320, Jul. 2025.
23. [23] Y. Tu, P. He, Ç. K. Koç, and J. Xie, "LEAP: Lightweight and efficient accelerator for sparse polynomial multiplication of HQC," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 31, no. 6, pp. 892–896, Jun. 2023.
24. [24] D. J. Bernstein, B. B. Brumley, M.-S. Chen, and N. Tuveri, "OpenSSLNTRU: Faster post-quantum TLS key exchange," in Proc. 31st USENIX Security Symp., Boston, MA, USA, 2022.
25. [25] fasthqc, "AVX2 implementation of HQC proposal," GitHub repository, 2019. [Online]. Available: https://github.com/fasthqc/hqc