Adaptation of a comprehensive simplification method to the Adaptive Exponential Integrate and Fire Neuron and Its FPGA-based verification

Abstract

The preference of a comprehensive method usage is as important as less hardware usage on digital device-based implementations. The mathematical series expansions have a widespread usage in the transformation of expressions into simpler forms. The exponential, trigonometric, logarithmic, etc. functions are usually converted to simpler expressions for digital implementation easiness. In these implementations, it is an expected output that as the operands of the series increases, the revised model converges to the original one. However, the most appropriate number determination of these operands is important for hardware efficiency. In here, the exponential expression of the Adaptive Exponential Integrate and Fire (ADEX) neuron model is expanded up to the tenth operand of the Taylor series. Then, an optimum operand number is identified for getting both hardware utilization efficiency and neuronal meaningfulness. The differences between the original and revised models are compared with the error calculations and the neuronal observations. Lastly, the revised ADEX neuron model is realized by FPGA device to prove the efficiency of the proposed adaptation.

Keywords

• Adaptive exponential integrate and fire (ADEX) neuron model
• Field Programmable Gate Array (FPGA)
• digital implementation
• neuromorphic engineering.

Kapsamlı bir basitleştirme yönteminin Uyarlanabilir Üstel Entegre ve Ateşlemeli Nöronuna uyarlanması ve FPGA tabanlı doğrulaması

Öz

Dijital cihaz tabanlı gerçekleştirimlerde kapsamlı bir yöntemin kullanılmasının tercihi, az donanım kullanımı kadar önemlidir. Matematiksel seri açılımları, ifadelerin daha basit biçimlere dönüştürülmesinde yaygın bir kullanıma sahiptir. Üstel, trigonometrik, logaritmik vb. işlevler genellikle dijital uygulama kolaylığı için daha basit ifadelere dönüştürülür. Bu uygulamalarda, serinin işlenenleri arttıkça, revize edilmiş modelin orijinal modele yakınsaması beklenen bir çıktıdır. Bununla birlikte, bu işlenenlerin en uygun sayısını belirlenmesi donanım verimliliği için önemlidir. Burada, Uyarlanabilir Üstel Entegre ve Ateşlemeli (ADEX) nöron modelinin üstel ifadesi, Taylor serisinin onuncu işlenenine kadar genişletilmiştir. Daha sonra, hem donanım kullanım verimliliği hem de nöronal anlamlılığı elde etmek için optimum bir işlenen sayısı belirlenmiştir. Orijinal ve revize edilmiş modeller arasındaki farklar, hata hesaplamaları ve nöronal gözlemlerle karşılaştırılmıştır. Son olarak, revize edilmiş ADEX nöron modeli, önerilen adaptasyonun verimliliğini kanıtlamak için FPGA cihazı tarafından gerçekleştirilmiştir.

Anahtar Kelimeler

• Uyarlanabilir üstel entegre ve ateşlemeli (ADEX) nöron modeli
• Alan Programlanabilir Kapı Dizisi (FPGA)
• dijital gerçekleştirim
• nöromorfik mühendislik.

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