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MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL

Cilt: 21 Sayı: 41 28 Haziran 2022
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MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL

Öz

Phase-locked loop (PLL) is a technique which has contributed significantly toward the technology advancement in communication. Phase and frequency synchronization problems have been present in electronic engineering since the first coherent modulation systems were developed. This paper gives basic details of PLL. It provides brief summary of the basic PLL principle applicable to control systems and digital communication. It also reports components of PLL and comparison among them. PLLs are responsible for recovering the correct time basis and synchronizing the processes. According to the application needs, different clock distribution strategies were developed, with the master-slave being the simplest and most used choice. PLL techniques is chosen for synchronization, since it is one of the most active synchronization techniques. This article contains Simulink of the MATLAB, simulation method and circuit design and mathematical solutions to synchronize PLL.

Anahtar Kelimeler

Kaynakça

  1. Ayat, M., Babaei, B., Atani, R. E., Mirzakuchaki, S. & Zamanlooy, B. (2010, April, 11-14). Design of a 100MHz – 1.66GHz, 0.13µm CMOS phase locked loop. 2010 International Conference on Electronic Devices, Systems and Applications, Malaysia, 154-158. https://doi.org/10.1109/icedsa.2010.5503082.
  2. De Brabandere, K., Loix, T., Engelen, K., Bolsens, B., Van den Keybus, J., Driesen, J. & Belmans, R. (2006, November, 6-10). Design and operation of a phase-locked loop with Kalman estimator-based filter for single-phase applications. IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics, Paris, 525-530. https://doi.org/10.1109/iecon.2006.348099.
  3. Guan-Chyun, H. & Hung, J. (1996). Phase-locked loop techniques. A survey. IEEE Transactions on Industrial Electronics, 43(6), 609-615. https://doi.org/10.1109/41.544547.
  4. Kailuke, A. C., Agrawal, P. & Kshirsagar, R. (2014, January, 9-11). Design of phase frequency detector and charge pump for low voltage high frequency PLL. 2014 International Conference on Electronic Systems, Signal Processing and Computing Technologies, India, 74-78. https://doi.org/10.1109/icesc.2014.21.
  5. Karimi-Ghartemani, M., Ooi, B. & Bakhshai, A. (2011). Application of enhanced phase-locked loop system to the computation of Synchrophasors. IEEE Transactions on Power Delivery, 26(1), 22-32. https://doi.org/10.1109/tpwrd.2010.2064341.
  6. Lata, K., & Kumar, M. (2013). ALL digital phase-locked loop (ADPLL): A survey. International Journal of Future Computer and Communication, 1(10). 551-554. https://doi.org/10.7763/ijfcc.2013.v2.225.
  7. Leonov, G. A., Kuznetsov, N. V., Yuldashev, M. V. & Yuldashev, R. V. (2015). Hold-in, pull-in, and lock-in ranges of PLL circuits: Rigorous mathematical definitions and limitations of classical theory. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(10), 2454-2464. https://doi.org/10.1109/tcsi.2015.2476295.
  8. Li, L., Wu, X. & Han, J. (2017). Design of 4GHz CMOS charge-pump phased-locked loop based on the Simulink behavioral simulation. Proceedings of the 2017 2nd International Conference on Automation, Mechanical and Electrical Engineering (AMEE 2017), 70-73. https://doi.org/10.2991/amee-17.2017.14.

Ayrıntılar

Birincil Dil

İngilizce

Konular

Elektrik Mühendisliği

Bölüm

Araştırma Makalesi

Yayımlanma Tarihi

28 Haziran 2022

Gönderilme Tarihi

14 Ekim 2021

Kabul Tarihi

26 Ocak 2022

Yayımlandığı Sayı

Yıl 2022 Cilt: 21 Sayı: 41

Kaynak Göster

APA
Kaplanoğlu Çantı, Z., & Yarkan, S. (2022). MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi, 21(41), 80-94. https://doi.org/10.55071/ticaretfbd.1008028
AMA
1.Kaplanoğlu Çantı Z, Yarkan S. MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi. 2022;21(41):80-94. doi:10.55071/ticaretfbd.1008028
Chicago
Kaplanoğlu Çantı, Zeynep, ve Serhan Yarkan. 2022. “MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL”. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi 21 (41): 80-94. https://doi.org/10.55071/ticaretfbd.1008028.
EndNote
Kaplanoğlu Çantı Z, Yarkan S (01 Haziran 2022) MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi 21 41 80–94.
IEEE
[1]Z. Kaplanoğlu Çantı ve S. Yarkan, “MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL”, İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi, c. 21, sy 41, ss. 80–94, Haz. 2022, doi: 10.55071/ticaretfbd.1008028.
ISNAD
Kaplanoğlu Çantı, Zeynep - Yarkan, Serhan. “MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL”. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi 21/41 (01 Haziran 2022): 80-94. https://doi.org/10.55071/ticaretfbd.1008028.
JAMA
1.Kaplanoğlu Çantı Z, Yarkan S. MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi. 2022;21:80–94.
MLA
Kaplanoğlu Çantı, Zeynep, ve Serhan Yarkan. “MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL”. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi, c. 21, sy 41, Haziran 2022, ss. 80-94, doi:10.55071/ticaretfbd.1008028.
Vancouver
1.Zeynep Kaplanoğlu Çantı, Serhan Yarkan. MASTER SLAVE PHASE SYNCHRONIZATION METHOD WITH XOR AND PHASE/FREQUENCY DETECTOR PLL. İstanbul Ticaret Üniversitesi Fen Bilimleri Dergisi. 01 Haziran 2022;21(41):80-94. doi:10.55071/ticaretfbd.1008028